From: Alexey Brodkin <abrod...@synopsys.com>

To avoid duplicating the MB DTS file, move the MB intc entry into cpu
card specific file

Cc: Grant Likely <grant.lik...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: devicet...@vger.kernel.org
Signed-off-by: Vineet Gupta <vgu...@synopsys.com>
---
 arch/arc/boot/dts/axc001.dtsi    | 21 +++++++++++++++++++++
 arch/arc/boot/dts/axs10x_mb.dtsi | 17 -----------------
 2 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 6990ca45fc7b..a5e2726a067e 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -69,6 +69,27 @@
                };
        };
 
+       /*
+        * This INTC is actually connected to DW APB GPIO
+        * which acts as a wire between MB INTC and CPU INTC.
+        * GPIO INTC is configured in platform init code
+        * and here we mimic direct connection from MB INTC to
+        * CPU INTC, thus we set "interrupts = <7>" instead of
+        * "interrupts = <12>"
+        *
+        * This intc actually resides on MB, but we move it here to
+        * avoid duplicating the MB dtsi file given that IRQ from
+        * this intc to cpu intc are different for axs101 and axs103
+        */
+       mb_intc: dw-apb-ictl@0xe0012000 {
+               #interrupt-cells = <1>;
+               compatible = "snps,dw-apb-ictl";
+               reg = < 0xe0012000 0x200 >;
+               interrupt-controller;
+               interrupt-parent = <&cpu_intc>;
+               interrupts = < 7 >;
+       };
+
        memory {
                #address-cells = <1>;
                #size-cells = <1>;
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 5d06f1fb4266..f3db32154973 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -36,23 +36,6 @@
                        };
                };
 
-               /*
-                * This INTC is actually connected to DW APB GPIO
-                * which acts as a wire between MB INTC and CPU INTC.
-                * GPIO INTC is configured in platform init code
-                * and here we mimic direct connection from MB INTC to
-                * CPU INTC, thus we set "interrupts = <7>" instead of
-                * "interrupts = <12>"
-                */
-               mb_intc: dw-apb-ictl@0x12000 {
-                       #interrupt-cells = <1>;
-                       compatible = "snps,dw-apb-ictl";
-                       reg = < 0x12000 0x200 >;
-                       interrupt-controller;
-                       interrupt-parent = <&cpu_intc>;
-                       interrupts = < 7 >;
-               };
-
                ethernet@0x18000 {
                        #interrupt-cells = <1>;
                        compatible = "snps,dwmac";
-- 
1.9.1

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