On Fri, May 29, 2015 at 09:28:02AM -0700, Ashok Raj wrote:
> This patch has handling changes to do_machine_check() to process MCE
> signaled as local MCE. Typically only recoverable errors (SRAR) type
> error will be Signaled as LMCE. But architecture does not restrict to
> only those errors.
>
> When errors are signaled as LMCE, there is no need for the MCE handler to
> perform rendezvous with other logical processors unlike earlier processors
> that would broadcast machine check errors.
>
> See http://www.intel.com/sdm Volume 3, Chapter 15 for more information
> on MSR's and documentation on Local MCE.
>
> Signed-off-by: Ashok Raj <ashok....@intel.com>
> ---
> arch/x86/kernel/cpu/mcheck/mce.c | 25 ++++++++++++++++++++++---
> arch/x86/kernel/cpu/mcheck/mce_intel.c | 1 +
> 2 files changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c
> b/arch/x86/kernel/cpu/mcheck/mce.c
> index d10aada..c130391 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -1047,6 +1047,7 @@ void do_machine_check(struct pt_regs *regs, long
> error_code)
> char *msg = "Unknown";
> u64 recover_paddr = ~0ull;
> int flags = MF_ACTION_REQUIRED;
> + int lmce = 0;
>
> prev_state = ist_enter(regs);
>
> @@ -1074,11 +1075,19 @@ void do_machine_check(struct pt_regs *regs, long
> error_code)
> kill_it = 1;
>
> /*
> + * Check if this MCE is signaled to only this logical processor
> + */
> + if (m.mcgstatus & MCG_STATUS_LMCES)
> + lmce = 1;
else
/*
* Go through ...
* ...
*/
order = mce_start(&no_way_out);
> + /*
> * Go through all the banks in exclusion of the other CPUs.
> * This way we don't report duplicated events on shared banks
> * because the first one to see it will clear it.
> + * If this is a Local MCE, then no need to perform rendezvous.
> */
> - order = mce_start(&no_way_out);
> + if (!lmce)
> + order = mce_start(&no_way_out);
> +
> for (i = 0; i < cfg->banks; i++) {
> __clear_bit(i, toclear);
> if (!test_bit(i, valid_banks))
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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