Use the generic irqchip_init function to probe irqchip drivers using DT,
and add the appropriate node to the JZ4740 devicetree in place of the
call to mips_cpu_irq_init.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Ian Campbell <ijc+devicet...@hellion.org.uk>
Cc: Kumar Gala <ga...@codeaurora.org>
Cc: Lars-Peter Clausen <l...@metafoo.de>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Pawel Moll <pawel.m...@arm.com>
Cc: Ralf Baechle <r...@linux-mips.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: devicet...@vger.kernel.org
Cc: linux-m...@linux-mips.org
---
Changes in v6:
- Rename cpuintc DT node interrupt-controller@0.
Changes in v5: None
Changes in v4: None
Changes in v3:
- Rebase.
Changes in v2: None
arch/mips/boot/dts/ingenic/jz4740.dtsi | 7 +++++++
arch/mips/jz4740/irq.c | 4 ++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi
b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index c538691f..dd3642f 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -2,4 +2,11 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "ingenic,jz4740";
+
+ cpuintc: interrupt-controller@0 {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
};
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
index 97206b3..3ec90875 100644
--- a/arch/mips/jz4740/irq.c
+++ b/arch/mips/jz4740/irq.c
@@ -18,6 +18,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/irqchip.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/delay.h>
@@ -27,7 +28,6 @@
#include <asm/io.h>
#include <asm/mipsregs.h>
-#include <asm/irq_cpu.h>
#include <asm/mach-jz4740/base.h>
#include <asm/mach-jz4740/irq.h>
@@ -84,7 +84,7 @@ void __init arch_init_irq(void)
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- mips_cpu_irq_init();
+ irqchip_init();
jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14);
--
2.4.1
--
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