* Andy Lutomirski <l...@amacapital.net> wrote:
> > on return from idle we'd do:
> >
> > rcu_qs_ctr += 4-2+1; /* Register QS, clear bit 1, set bit 0 */
> >
> > etc. On all boundary transitions we can use a constant ADD on a
> > suitable percpu variable.
>
> Sounds good to me, except that we need to be careful to distinguish
> between non-syscall entries from quiescent states
> and non-syscall entries from quiescent states.
It might be hard to make that distinction! ;-)
I suspect you wanted to raise the issue of various contexts nesting on
each other, such as syscall triggering a page fault, which gets an irq
nested, etc. - versus non-nested contexts such as user-space
triggering a page fault or user-space getting an irq?
> [...] We could save the old state (as the current exception_enter
> code does) or we could allocate enough low bits for the state that
> the problem goes away.
So I think, if it all works in practice just as well as it does in
email, we might be better off with more state bits: that would tell
any remote statistics/sampling code more as well.
It might also be easier to patch in/out, because this kind of state
tracking will affect non-RT CPUs as well. (Later on we could do a
separate IDT for RT CPUs as well, with a patched version of the entry
code.)
> I don't think the TIF_RCU_QS variant is worthwhile -- merging the
> counter and state is probably both easier and faster.
Yeah.
Thanks,
Ingo
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