On Tue, 2015-05-05 at 11:25 +0200, Michal Simek wrote: > From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > > The AXI-DMA rx-delay interrupt can sometimes be triggered > when there are 0 outstanding packets received. This is due > to the fact that the receive function will greedily consume > as many packets as possible on interrupt. So if two packets > (with a very particular timing) arrive in succession they > will each cause the rx-delay interrupt, but the first interrupt > will consume both packets. > This means the second interrupt is a 0 packet receive. > > This is mostly OK, except that the tail pointer register is > updated unconditionally on receive. Currently the tail pointer > is always set to the current bd-ring descriptor under > the assumption that the hardware has moved onto the next > descriptor. What this means for length 0 recv is the current > descriptor that the hardware is potentially yet to use will > be marked as the tail. This causes the hardware to think > its run out of descriptors deadlocking the whole rx path. > > Fixed by updating the tail pointer to the most recent > successfully consumed descriptor.
I think some of this would be good to have as comments in the code instead of just in the changelog. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
