* Daniel J Blueman <dan...@numascale.com> wrote:
> The Intel SDM [1] and AMD F15h BKDG [2] state that IPIs
> are queued, so the wait_icr_idle() polling is only
> necessary on PPro and older, and maybe then to avoid
> delivery retry. This unnecessarily ties up the IPI
> caller, so we bypass the polling in the Numachip APIC
> driver IPI-to-self path.
It would be nice to propagate this back to the generic x86
code.
> On Linus's earlier point, with the large core counts on
> Numascale systems, I previously implemented a shortcut to
> allow single IPIs to bypass all the cpumask generation
> and walking; it's way down on my list, but I'll see if I
> can generalise and present a patch series at some point
> if interested?
I am definitely interested!
Thanks,
Ingo
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