* Borislav Petkov <b...@alien8.de> wrote:
> Hi guys,
>
> branch has been rebased for commit messages to adhere to tip standards.
>
> Please pull, thanks.
>
> ---
> The following changes since commit ec6f34e5b552fb0a52e6aae1a5afbbb1605cc6cc:
>
> Linux 3.19-rc5 (2015-01-18 18:02:20 +1200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git tags/ras_for_3.21
>
> for you to fetch changes up to a021de25bfb648f6b336227ebb3211dfeb34dd7e:
>
> x86/MCE/AMD: Enable thresholding interrupts by default if supported
> (2015-02-19 12:04:16 +0100)
>
> ----------------------------------------------------------------
> * Enable AMD thresholding IRQ by default if supported, from Aravind
> Gopalakrishnan.
>
> * Unify mce_panic() message pattern, from Derek Che.
>
> * A bit more involved simplification of the CMCI logic after yet another
> report about race condition with the adaptive logic.
>
> * ACPI APEI EINJ fleshing out of the user documentation.
>
> * Minor cleanup from Jan Beulich.
>
> ----------------------------------------------------------------
> Aravind Gopalakrishnan (1):
> x86/MCE/AMD: Enable thresholding interrupts by default if supported
>
> Borislav Petkov (2):
> Documentation/acpi/einj: Correct and streamline text
> x86/MCE/intel: Cleanup CMCI storm logic
>
> Derek Che (1):
> x86/MCE: Make mce_panic() fatal machine check msg in the same pattern
>
> Jan Beulich (1):
> x86/MCE/AMD: Drop bogus const modifier from AMD's bank4_names()
>
> Documentation/acpi/apei/einj.txt | 196
> +++++++++++++++++++-----------
> arch/x86/include/asm/mce.h | 8 +-
> arch/x86/kernel/cpu/mcheck/mce-internal.h | 9 +-
> arch/x86/kernel/cpu/mcheck/mce.c | 90 +++++++-------
> arch/x86/kernel/cpu/mcheck/mce_amd.c | 11 +-
> arch/x86/kernel/cpu/mcheck/mce_intel.c | 63 ++++++----
> 6 files changed, 228 insertions(+), 149 deletions(-)
Pulled into tip:x86/ras, thanks Boris!
Ingo
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