[PATCH 3.12 071/122] ASoC: sgtl5000: add delay before first I2C access

[Jiri Slaby]

From: Eric Nelson <eric.nel...@boundarydevices.com>

3.12-stable review patch.  If anyone has any objections, please let me know.

===============

commit 58cc9c9a175885bbf6bae3acf18233d0a8229a84 upstream.

To quote from section 1.3.1 of the data sheet:
        The SGTL5000 has an internal reset that is deasserted
        8 SYS_MCLK cycles after all power rails have been brought
        up. After this time, communication can start

        ...
        1.0us represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK.

Signed-off-by: Eric Nelson <eric.nel...@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.este...@freescale.com>
Signed-off-by: Mark Brown <broo...@kernel.org>
Signed-off-by: Jiri Slaby <jsl...@suse.cz>
---
 sound/soc/codecs/sgtl5000.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index b76c6b619227..ba73f832e455 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -1550,6 +1550,9 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
        if (ret)
                return ret;
 
+       /* Need 8 clocks before I2C accesses */
+       udelay(1);
+
        /* read chip information */
        ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, &reg);
        if (ret)
-- 
2.2.2

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