On Tue, Jan 27, 2015 at 02:25:16PM -0800, Doug Anderson wrote: > On some dw_wdt implementations the "top" register may be initted to 0 > at bootup. In such a case, each "pat" of the watchdog will reset the > timer to 0xffff. That's pretty short. > > The input clock of the wdt can be any of a wide range of values. On > an rk3288 system, I've seen the wdt clock be 24.75 MHz. That means > each tick is ~40ns and we'll count to 0xffff in ~2.6ms. > > Because of the above two facts, it's a really good idea to pat the > watchdog after initting the "top" register properly and before > enabling the watchdog. If you don't then there's no way we'll get the > next heartbeat in time. > > Jisheng Zhang fixed this problem on some dw_wdt versions by using the > TOP_INIT feature. However, the dw_wdt on rk3288 doesn't have TOP_INIT > so it's a good idea to also pat the watchdog manually. > > Signed-off-by: Doug Anderson <diand...@chromium.org>
Reviewed-by: Guenter Roeck <li...@roeck-us.net> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
