On Wed, Jan 7, 2015 at 9:22 AM, Dave Hansen <dave.han...@linux.intel.com> wrote:
> On 12/29/2014 04:52 PM, Andy Lutomirski wrote:
>> --- a/arch/x86/mm/mpx.c
>> +++ b/arch/x86/mm/mpx.c
>> @@ -217,7 +217,7 @@ static int mpx_insn_decode(struct insn *insn,
>> struct pt_regs *regs)
>> {
>> unsigned char buf[MAX_INSN_SIZE];
>> - int x86_64 = !test_thread_flag(TIF_IA32);
>> + int x86_64 = user_64bit_mode(regs);
>> int not_copied;
>> int nr_copied;
>
> There are (at least) 3 other uses of the instruction decoder that use
> some form of a check on TIF_IA32:
>
>> perf_event_intel_ds.c intel_pmu_pebs_fixup_ip 785 insn_init(&insn, kaddr,
>> size, is_64bit);
>> perf_event_intel_lbr.c branch_type 532 insn_init(&insn, addr,
>> bytes_read, is64);
>> uprobes.c uprobe_init_insn 222 insn_init(insn,
>> auprobe->insn, sizeof(auprobe->insn), x86_64);
>
> Basically doing this:
>
> is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
>
> So this method *must* work, at least in practice.
>
> If userspace has MPX on and switches between 32 and 64-bit itself, the
> kernel *and* the hardware will suddenly be trying to walk the bounds
> tables in the wrong format. I just don't see an application surviving
> very long in that situation.
>
> So I don't have a problem with doing this, long term, as long as we do
> it for all of these locations and we do it in a consistent way. For
> MPX, we may even want to enforce that:
>
> !test_thread_flag(TIF_IA32) == user_64bit_mode(regs)
>
> and freak out if that fails.
>
> But I don't think it's 3.19 material.
Fair enough. Will send for 3.20 instead.
--Andy
--
Andy Lutomirski
AMA Capital Management, LLC
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