Rename pSeries_pci.c to rtas_pci.c as a preparation to generalize it
(Bfor use by BPA. Most of the file can be used by any machine that
(Bimplements rtas.
(B
(BSigned-off-by: Arnd Bergmann <[EMAIL PROTECTED]>
(B
(B--- linux-2.6-ppc.orig/arch/ppc64/kernel/Makefile 2005-03-31
(B19:11:15.464956912 -0500
(B+++ linux-2.6-ppc/arch/ppc64/kernel/Makefile 2005-03-31 19:11:37.754895872
(B-0500
(B@@ -32,13 +32,14 @@ obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram
(B
(B obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
(B pSeries_nvram.o rtasd.o ras.o pSeries_reconfig.o \
(B- xics.o rtas.o pSeries_setup.o pSeries_iommu.o
(B+ xics.o pSeries_setup.o pSeries_iommu.o
(B
(B obj-$(CONFIG_EEH) += eeh.o
(B obj-$(CONFIG_PROC_FS) += proc_ppc64.o
(B obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
(B obj-$(CONFIG_SMP) += smp.o
(B obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
(B+obj-$(CONFIG_PPC_RTAS) += rtas.o rtas_pci.o
(B obj-$(CONFIG_RTAS_PROC) += rtas-proc.o
(B obj-$(CONFIG_SCANLOG) += scanlog.o
(B obj-$(CONFIG_VIOPATH) += viopath.o
(B--- linux-2.6-ppc.orig/arch/ppc64/kernel/pSeries_pci.c 2005-03-31
(B19:11:15.466956608 -0500
(B+++ linux-2.6-ppc/arch/ppc64/kernel/pSeries_pci.c 1969-12-31
(B19:00:00.000000000 -0500
(B@@ -1,602 +0,0 @@
(B-/*
(B- * pSeries_pci.c
(B- *
(B- * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
(B- * Copyright (C) 2003 Anton Blanchard <[EMAIL PROTECTED]>, IBM
(B- *
(B- * pSeries specific routines for PCI.
(B- *
(B- * Based on code from pci.c and chrp_pci.c
(B- *
(B- * This program is free software; you can redistribute it and/or modify
(B- * it under the terms of the GNU General Public License as published by
(B- * the Free Software Foundation; either version 2 of the License, or
(B- * (at your option) any later version.
(B- *
(B- * This program is distributed in the hope that it will be useful,
(B- * but WITHOUT ANY WARRANTY; without even the implied warranty of
(B- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
(B- * GNU General Public License for more details.
(B- *
(B- * You should have received a copy of the GNU General Public License
(B- * along with this program; if not, write to the Free Software
(B- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
(B- */
(B-
(B-#include <linux/kernel.h>
(B-#include <linux/threads.h>
(B-#include <linux/pci.h>
(B-#include <linux/string.h>
(B-#include <linux/init.h>
(B-#include <linux/bootmem.h>
(B-
(B-#include <asm/io.h>
(B-#include <asm/pgtable.h>
(B-#include <asm/irq.h>
(B-#include <asm/prom.h>
(B-#include <asm/machdep.h>
(B-#include <asm/pci-bridge.h>
(B-#include <asm/iommu.h>
(B-#include <asm/rtas.h>
(B-
(B-#include "mpic.h"
(B-#include "pci.h"
(B-
(B-/* RTAS tokens */
(B-static int read_pci_config;
(B-static int write_pci_config;
(B-static int ibm_read_pci_config;
(B-static int ibm_write_pci_config;
(B-
(B-static int s7a_workaround;
(B-
(B-extern struct mpic *pSeries_mpic;
(B-
(B-static int config_access_valid(struct device_node *dn, int where)
(B-{
(B- if (where < 256)
(B- return 1;
(B- if (where < 4096 && dn->pci_ext_config_space)
(B- return 1;
(B-
(B- return 0;
(B-}
(B-
(B-static int rtas_read_config(struct device_node *dn, int where, int size, u32
(B*val)
(B-{
(B- int returnval = -1;
(B- unsigned long buid, addr;
(B- int ret;
(B-
(B- if (!dn)
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B- if (!config_access_valid(dn, where))
(B- return PCIBIOS_BAD_REGISTER_NUMBER;
(B-
(B- addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
(B- (dn->devfn << 8) | (where & 0xff);
(B- buid = dn->phb->buid;
(B- if (buid) {
(B- ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
(B- addr, buid >> 32, buid & 0xffffffff, size);
(B- } else {
(B- ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
(B- }
(B- *val = returnval;
(B-
(B- if (ret)
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B-
(B- if (returnval == EEH_IO_ERROR_VALUE(size)
(B- && eeh_dn_check_failure (dn, NULL))
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B-
(B- return PCIBIOS_SUCCESSFUL;
(B-}
(B-
(B-static int rtas_pci_read_config(struct pci_bus *bus,
(B- unsigned int devfn,
(B- int where, int size, u32 *val)
(B-{
(B- struct device_node *busdn, *dn;
(B-
(B- if (bus->self)
(B- busdn = pci_device_to_OF_node(bus->self);
(B- else
(B- busdn = bus->sysdata; /* must be a phb */
(B-
(B- /* Search only direct children of the bus */
(B- for (dn = busdn->child; dn; dn = dn->sibling)
(B- if (dn->devfn == devfn)
(B- return rtas_read_config(dn, where, size, val);
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B-}
(B-
(B-static int rtas_write_config(struct device_node *dn, int where, int size, u32
(Bval)
(B-{
(B- unsigned long buid, addr;
(B- int ret;
(B-
(B- if (!dn)
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B- if (!config_access_valid(dn, where))
(B- return PCIBIOS_BAD_REGISTER_NUMBER;
(B-
(B- addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
(B- (dn->devfn << 8) | (where & 0xff);
(B- buid = dn->phb->buid;
(B- if (buid) {
(B- ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >>
(B32, buid & 0xffffffff, size, (ulong) val);
(B- } else {
(B- ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size,
(B(ulong)val);
(B- }
(B-
(B- if (ret)
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B-
(B- return PCIBIOS_SUCCESSFUL;
(B-}
(B-
(B-static int rtas_pci_write_config(struct pci_bus *bus,
(B- unsigned int devfn,
(B- int where, int size, u32 val)
(B-{
(B- struct device_node *busdn, *dn;
(B-
(B- if (bus->self)
(B- busdn = pci_device_to_OF_node(bus->self);
(B- else
(B- busdn = bus->sysdata; /* must be a phb */
(B-
(B- /* Search only direct children of the bus */
(B- for (dn = busdn->child; dn; dn = dn->sibling)
(B- if (dn->devfn == devfn)
(B- return rtas_write_config(dn, where, size, val);
(B- return PCIBIOS_DEVICE_NOT_FOUND;
(B-}
(B-
(B-struct pci_ops rtas_pci_ops = {
(B- rtas_pci_read_config,
(B- rtas_pci_write_config
(B-};
(B-
(B-int is_python(struct device_node *dev)
(B-{
(B- char *model = (char *)get_property(dev, "model", NULL);
(B-
(B- if (model && strstr(model, "Python"))
(B- return 1;
(B-
(B- return 0;
(B-}
(B-
(B-static int get_phb_reg_prop(struct device_node *dev,
(B- unsigned int addr_size_words,
(B- struct reg_property64 *reg)
(B-{
(B- unsigned int *ui_ptr = NULL, len;
(B-
(B- /* Found a PHB, now figure out where his registers are mapped. */
(B- ui_ptr = (unsigned int *)get_property(dev, "reg", &len);
(B- if (ui_ptr == NULL)
(B- return 1;
(B-
(B- if (addr_size_words == 1) {
(B- reg->address = ((struct reg_property32 *)ui_ptr)->address;
(B- reg->size = ((struct reg_property32 *)ui_ptr)->size;
(B- } else {
(B- *reg = *((struct reg_property64 *)ui_ptr);
(B- }
(B-
(B- return 0;
(B-}
(B-
(B-static void python_countermeasures(struct device_node *dev,
(B- unsigned int addr_size_words)
(B-{
(B- struct reg_property64 reg_struct;
(B- void __iomem *chip_regs;
(B- volatile u32 val;
(B-
(B- if (get_phb_reg_prop(dev, addr_size_words, ®_struct))
(B- return;
(B-
(B- /* Python's register file is 1 MB in size. */
(B- chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
(B-
(B- /*
(B- * Firmware doesn't always clear this bit which is critical
(B- * for good performance - Anton
(B- */
(B-
(B-#define PRG_CL_RESET_VALID 0x00010000
(B-
(B- val = in_be32(chip_regs + 0xf6030);
(B- if (val & PRG_CL_RESET_VALID) {
(B- printk(KERN_INFO "Python workaround: ");
(B- val &= ~PRG_CL_RESET_VALID;
(B- out_be32(chip_regs + 0xf6030, val);
(B- /*
(B- * We must read it back for changes to
(B- * take effect
(B- */
(B- val = in_be32(chip_regs + 0xf6030);
(B- printk("reg0: %x\n", val);
(B- }
(B-
(B- iounmap(chip_regs);
(B-}
(B-
(B-void __init init_pci_config_tokens (void)
(B-{
(B- read_pci_config = rtas_token("read-pci-config");
(B- write_pci_config = rtas_token("write-pci-config");
(B- ibm_read_pci_config = rtas_token("ibm,read-pci-config");
(B- ibm_write_pci_config = rtas_token("ibm,write-pci-config");
(B-}
(B-
(B-unsigned long __devinit get_phb_buid (struct device_node *phb)
(B-{
(B- int addr_cells;
(B- unsigned int *buid_vals;
(B- unsigned int len;
(B- unsigned long buid;
(B-
(B- if (ibm_read_pci_config == -1) return 0;
(B-
(B- /* PHB's will always be children of the root node,
(B- * or so it is promised by the current firmware. */
(B- if (phb->parent == NULL)
(B- return 0;
(B- if (phb->parent->parent)
(B- return 0;
(B-
(B- buid_vals = (unsigned int *) get_property(phb, "reg", &len);
(B- if (buid_vals == NULL)
(B- return 0;
(B-
(B- addr_cells = prom_n_addr_cells(phb);
(B- if (addr_cells == 1) {
(B- buid = (unsigned long) buid_vals[0];
(B- } else {
(B- buid = (((unsigned long)buid_vals[0]) << 32UL) |
(B- (((unsigned long)buid_vals[1]) & 0xffffffff);
(B- }
(B- return buid;
(B-}
(B-
(B-static int phb_set_bus_ranges(struct device_node *dev,
(B- struct pci_controller *phb)
(B-{
(B- int *bus_range;
(B- unsigned int len;
(B-
(B- bus_range = (int *) get_property(dev, "bus-range", &len);
(B- if (bus_range == NULL || len < 2 * sizeof(int)) {
(B- return 1;
(B- }
(B-
(B- phb->first_busno = bus_range[0];
(B- phb->last_busno = bus_range[1];
(B-
(B- return 0;
(B-}
(B-
(B-static int __devinit setup_phb(struct device_node *dev,
(B- struct pci_controller *phb,
(B- unsigned int addr_size_words)
(B-{
(B- pci_setup_pci_controller(phb);
(B-
(B- if (is_python(dev))
(B- python_countermeasures(dev, addr_size_words);
(B-
(B- if (phb_set_bus_ranges(dev, phb))
(B- return 1;
(B-
(B- phb->arch_data = dev;
(B- phb->ops = &rtas_pci_ops;
(B- phb->buid = get_phb_buid(dev);
(B-
(B- return 0;
(B-}
(B-
(B-static void __devinit add_linux_pci_domain(struct device_node *dev,
(B- struct pci_controller *phb,
(B- struct property *of_prop)
(B-{
(B- memset(of_prop, 0, sizeof(struct property));
(B- of_prop->name = "linux,pci-domain";
(B- of_prop->length = sizeof(phb->global_number);
(B- of_prop->value = (unsigned char *)&of_prop[1];
(B- memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
(B- prom_add_property(dev, of_prop);
(B-}
(B-
(B-static struct pci_controller * __init alloc_phb(struct device_node *dev,
(B- unsigned int addr_size_words)
(B-{
(B- struct pci_controller *phb;
(B- struct property *of_prop;
(B-
(B- phb = alloc_bootmem(sizeof(struct pci_controller));
(B- if (phb == NULL)
(B- return NULL;
(B-
(B- of_prop = alloc_bootmem(sizeof(struct property) +
(B- sizeof(phb->global_number));
(B- if (!of_prop)
(B- return NULL;
(B-
(B- if (setup_phb(dev, phb, addr_size_words))
(B- return NULL;
(B-
(B- add_linux_pci_domain(dev, phb, of_prop);
(B-
(B- return phb;
(B-}
(B-
(B-static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node
(B*dev, unsigned int addr_size_words)
(B-{
(B- struct pci_controller *phb;
(B-
(B- phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller),
(B- GFP_KERNEL);
(B- if (phb == NULL)
(B- return NULL;
(B-
(B- if (setup_phb(dev, phb, addr_size_words))
(B- return NULL;
(B-
(B- phb->is_dynamic = 1;
(B-
(B- /* TODO: linux,pci-domain? */
(B-
(B- return phb;
(B-}
(B-
(B-unsigned long __init find_and_init_phbs(void)
(B-{
(B- struct device_node *node;
(B- struct pci_controller *phb;
(B- unsigned int root_size_cells = 0;
(B- unsigned int index;
(B- unsigned int *opprop = NULL;
(B- struct device_node *root = of_find_node_by_path("/");
(B-
(B- if (ppc64_interrupt_controller == IC_OPEN_PIC) {
(B- opprop = (unsigned int *)get_property(root,
(B- "platform-open-pic", NULL);
(B- }
(B-
(B- root_size_cells = prom_n_size_cells(root);
(B-
(B- index = 0;
(B-
(B- for (node = of_get_next_child(root, NULL);
(B- node != NULL;
(B- node = of_get_next_child(root, node)) {
(B- if (node->type == NULL || strcmp(node->type, "pci") != 0)
(B- continue;
(B-
(B- phb = alloc_phb(node, root_size_cells);
(B- if (!phb)
(B- continue;
(B-
(B- pci_process_bridge_OF_ranges(phb, node);
(B- pci_setup_phb_io(phb, index == 0);
(B-
(B- if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
(B- int addr = root_size_cells * (index + 2) - 1;
(B- mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
(B- }
(B-
(B- index++;
(B- }
(B-
(B- of_node_put(root);
(B- pci_devs_phb_init();
(B-
(B- /*
(B- * pci_probe_only and pci_assign_all_buses can be set via properties
(B- * in chosen.
(B- */
(B- if (of_chosen) {
(B- int *prop;
(B-
(B- prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
(B- NULL);
(B- if (prop)
(B- pci_probe_only = *prop;
(B-
(B- prop = (int *)get_property(of_chosen,
(B- "linux,pci-assign-all-buses", NULL);
(B- if (prop)
(B- pci_assign_all_buses = *prop;
(B- }
(B-
(B- return 0;
(B-}
(B-
(B-struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
(B-{
(B- struct device_node *root = of_find_node_by_path("/");
(B- unsigned int root_size_cells = 0;
(B- struct pci_controller *phb;
(B- struct pci_bus *bus;
(B- int primary;
(B-
(B- root_size_cells = prom_n_size_cells(root);
(B-
(B- primary = list_empty(&hose_list);
(B- phb = alloc_phb_dynamic(dn, root_size_cells);
(B- if (!phb)
(B- return NULL;
(B-
(B- pci_process_bridge_OF_ranges(phb, dn);
(B-
(B- pci_setup_phb_io_dynamic(phb, primary);
(B- of_node_put(root);
(B-
(B- pci_devs_phb_init_dynamic(phb);
(B- phb->last_busno = 0xff;
(B- bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data);
(B- phb->bus = bus;
(B- phb->last_busno = bus->subordinate;
(B-
(B- return phb;
(B-}
(B-EXPORT_SYMBOL(init_phb_dynamic);
(B-
(B-#if 0
(B-void pcibios_name_device(struct pci_dev *dev)
(B-{
(B- struct device_node *dn;
(B-
(B- /*
(B- * Add IBM loc code (slot) as a prefix to the device names for service
(B- */
(B- dn = pci_device_to_OF_node(dev);
(B- if (dn) {
(B- char *loc_code = get_property(dn, "ibm,loc-code", 0);
(B- if (loc_code) {
(B- int loc_len = strlen(loc_code);
(B- if (loc_len < sizeof(dev->dev.name)) {
(B- memmove(dev->dev.name+loc_len+1, dev->dev.name,
(B- sizeof(dev->dev.name)-loc_len-1);
(B- memcpy(dev->dev.name, loc_code, loc_len);
(B- dev->dev.name[loc_len] = ' ';
(B- dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
(B- }
(B- }
(B- }
(B-}
(B-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
(B-#endif
(B-
(B-static void check_s7a(void)
(B-{
(B- struct device_node *root;
(B- char *model;
(B-
(B- root = of_find_node_by_path("/");
(B- if (root) {
(B- model = get_property(root, "model", NULL);
(B- if (model && !strcmp(model, "IBM,7013-S7A"))
(B- s7a_workaround = 1;
(B- of_node_put(root);
(B- }
(B-}
(B-
(B-/* RPA-specific bits for removing PHBs */
(B-int pcibios_remove_root_bus(struct pci_controller *phb)
(B-{
(B- struct pci_bus *b = phb->bus;
(B- struct resource *res;
(B- int rc, i;
(B-
(B- res = b->resource[0];
(B- if (!res->flags) {
(B- printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
(B- b->name);
(B- return 1;
(B- }
(B-
(B- rc = unmap_bus_range(b);
(B- if (rc) {
(B- printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
(B- __FUNCTION__, b->name);
(B- return 1;
(B- }
(B-
(B- if (release_resource(res)) {
(B- printk(KERN_ERR "%s: failed to release IO on bus %s\n",
(B- __FUNCTION__, b->name);
(B- return 1;
(B- }
(B-
(B- for (i = 1; i < 3; ++i) {
(B- res = b->resource[i];
(B- if (!res->flags && i == 0) {
(B- printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
(B- __FUNCTION__, b->name);
(B- return 1;
(B- }
(B- if (res->flags && release_resource(res)) {
(B- printk(KERN_ERR
(B- "%s: failed to release IO %d on bus %s\n",
(B- __FUNCTION__, i, b->name);
(B- return 1;
(B- }
(B- }
(B-
(B- list_del(&phb->list_node);
(B- if (phb->is_dynamic)
(B- kfree(phb);
(B-
(B- return 0;
(B-}
(B-EXPORT_SYMBOL(pcibios_remove_root_bus);
(B-
(B-static void __init pSeries_request_regions(void)
(B-{
(B- if (!isa_io_base)
(B- return;
(B-
(B- request_region(0x20,0x20,"pic1");
(B- request_region(0xa0,0x20,"pic2");
(B- request_region(0x00,0x20,"dma1");
(B- request_region(0x40,0x20,"timer");
(B- request_region(0x80,0x10,"dma page reg");
(B- request_region(0xc0,0x20,"dma2");
(B-}
(B-
(B-void __init pSeries_final_fixup(void)
(B-{
(B- struct pci_dev *dev = NULL;
(B-
(B- check_s7a();
(B-
(B- for_each_pci_dev(dev) {
(B- pci_read_irq_line(dev);
(B- if (s7a_workaround) {
(B- if (dev->irq > 16) {
(B- dev->irq -= 3;
(B- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
(Bdev->irq);
(B- }
(B- }
(B- }
(B-
(B- phbs_remap_io();
(B- pSeries_request_regions();
(B-
(B- pci_addr_cache_build();
(B-}
(B-
(B-/*
(B- * Assume the winbond 82c105 is the IDE controller on a
(B- * p610. We should probably be more careful in case
(B- * someone tries to plug in a similar adapter.
(B- */
(B-static void fixup_winbond_82c105(struct pci_dev* dev)
(B-{
(B- int i;
(B- unsigned int reg;
(B-
(B- if (!(systemcfg->platform & PLATFORM_PSERIES))
(B- return;
(B-
(B- printk("Using INTC for W82c105 IDE controller.\n");
(B- pci_read_config_dword(dev, 0x40, ®);
(B- /* Enable LEGIRQ to use INTC instead of ISA interrupts */
(B- pci_write_config_dword(dev, 0x40, reg | (1<<11));
(B-
(B- for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
(B- /* zap the 2nd function of the winbond chip */
(B- if (dev->resource[i].flags & IORESOURCE_IO
(B- && dev->bus->number == 0 && dev->devfn == 0x81)
(B- dev->resource[i].flags &= ~IORESOURCE_IO;
(B- }
(B-}
(B-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
(B- fixup_winbond_82c105);
(B--- linux-2.6-ppc.orig/arch/ppc64/kernel/rtas_pci.c 1969-12-31
(B19:00:00.000000000 -0500
(B+++ linux-2.6-ppc/arch/ppc64/kernel/rtas_pci.c 2005-03-31 19:11:37.758895264
(B-0500
(B@@ -0,0 +1,602 @@
(B+/*
(B+ * pSeries_pci.c
(B+ *
(B+ * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
(B+ * Copyright (C) 2003 Anton Blanchard <[EMAIL PROTECTED]>, IBM
(B+ *
(B+ * pSeries specific routines for PCI.
(B+ *
(B+ * Based on code from pci.c and chrp_pci.c
(B+ *
(B+ * This program is free software; you can redistribute it and/or modify
(B+ * it under the terms of the GNU General Public License as published by
(B+ * the Free Software Foundation; either version 2 of the License, or
(B+ * (at your option) any later version.
(B+ *
(B+ * This program is distributed in the hope that it will be useful,
(B+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
(B+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
(B+ * GNU General Public License for more details.
(B+ *
(B+ * You should have received a copy of the GNU General Public License
(B+ * along with this program; if not, write to the Free Software
(B+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
(B+ */
(B+
(B+#include <linux/kernel.h>
(B+#include <linux/threads.h>
(B+#include <linux/pci.h>
(B+#include <linux/string.h>
(B+#include <linux/init.h>
(B+#include <linux/bootmem.h>
(B+
(B+#include <asm/io.h>
(B+#include <asm/pgtable.h>
(B+#include <asm/irq.h>
(B+#include <asm/prom.h>
(B+#include <asm/machdep.h>
(B+#include <asm/pci-bridge.h>
(B+#include <asm/iommu.h>
(B+#include <asm/rtas.h>
(B+
(B+#include "mpic.h"
(B+#include "pci.h"
(B+
(B+/* RTAS tokens */
(B+static int read_pci_config;
(B+static int write_pci_config;
(B+static int ibm_read_pci_config;
(B+static int ibm_write_pci_config;
(B+
(B+static int s7a_workaround;
(B+
(B+extern struct mpic *pSeries_mpic;
(B+
(B+static int config_access_valid(struct device_node *dn, int where)
(B+{
(B+ if (where < 256)
(B+ return 1;
(B+ if (where < 4096 && dn->pci_ext_config_space)
(B+ return 1;
(B+
(B+ return 0;
(B+}
(B+
(B+static int rtas_read_config(struct device_node *dn, int where, int size, u32
(B*val)
(B+{
(B+ int returnval = -1;
(B+ unsigned long buid, addr;
(B+ int ret;
(B+
(B+ if (!dn)
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+ if (!config_access_valid(dn, where))
(B+ return PCIBIOS_BAD_REGISTER_NUMBER;
(B+
(B+ addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
(B+ (dn->devfn << 8) | (where & 0xff);
(B+ buid = dn->phb->buid;
(B+ if (buid) {
(B+ ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
(B+ addr, buid >> 32, buid & 0xffffffff, size);
(B+ } else {
(B+ ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
(B+ }
(B+ *val = returnval;
(B+
(B+ if (ret)
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+
(B+ if (returnval == EEH_IO_ERROR_VALUE(size)
(B+ && eeh_dn_check_failure (dn, NULL))
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+
(B+ return PCIBIOS_SUCCESSFUL;
(B+}
(B+
(B+static int rtas_pci_read_config(struct pci_bus *bus,
(B+ unsigned int devfn,
(B+ int where, int size, u32 *val)
(B+{
(B+ struct device_node *busdn, *dn;
(B+
(B+ if (bus->self)
(B+ busdn = pci_device_to_OF_node(bus->self);
(B+ else
(B+ busdn = bus->sysdata; /* must be a phb */
(B+
(B+ /* Search only direct children of the bus */
(B+ for (dn = busdn->child; dn; dn = dn->sibling)
(B+ if (dn->devfn == devfn)
(B+ return rtas_read_config(dn, where, size, val);
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+}
(B+
(B+static int rtas_write_config(struct device_node *dn, int where, int size, u32
(Bval)
(B+{
(B+ unsigned long buid, addr;
(B+ int ret;
(B+
(B+ if (!dn)
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+ if (!config_access_valid(dn, where))
(B+ return PCIBIOS_BAD_REGISTER_NUMBER;
(B+
(B+ addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
(B+ (dn->devfn << 8) | (where & 0xff);
(B+ buid = dn->phb->buid;
(B+ if (buid) {
(B+ ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >>
(B32, buid & 0xffffffff, size, (ulong) val);
(B+ } else {
(B+ ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size,
(B(ulong)val);
(B+ }
(B+
(B+ if (ret)
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+
(B+ return PCIBIOS_SUCCESSFUL;
(B+}
(B+
(B+static int rtas_pci_write_config(struct pci_bus *bus,
(B+ unsigned int devfn,
(B+ int where, int size, u32 val)
(B+{
(B+ struct device_node *busdn, *dn;
(B+
(B+ if (bus->self)
(B+ busdn = pci_device_to_OF_node(bus->self);
(B+ else
(B+ busdn = bus->sysdata; /* must be a phb */
(B+
(B+ /* Search only direct children of the bus */
(B+ for (dn = busdn->child; dn; dn = dn->sibling)
(B+ if (dn->devfn == devfn)
(B+ return rtas_write_config(dn, where, size, val);
(B+ return PCIBIOS_DEVICE_NOT_FOUND;
(B+}
(B+
(B+struct pci_ops rtas_pci_ops = {
(B+ rtas_pci_read_config,
(B+ rtas_pci_write_config
(B+};
(B+
(B+int is_python(struct device_node *dev)
(B+{
(B+ char *model = (char *)get_property(dev, "model", NULL);
(B+
(B+ if (model && strstr(model, "Python"))
(B+ return 1;
(B+
(B+ return 0;
(B+}
(B+
(B+static int get_phb_reg_prop(struct device_node *dev,
(B+ unsigned int addr_size_words,
(B+ struct reg_property64 *reg)
(B+{
(B+ unsigned int *ui_ptr = NULL, len;
(B+
(B+ /* Found a PHB, now figure out where his registers are mapped. */
(B+ ui_ptr = (unsigned int *)get_property(dev, "reg", &len);
(B+ if (ui_ptr == NULL)
(B+ return 1;
(B+
(B+ if (addr_size_words == 1) {
(B+ reg->address = ((struct reg_property32 *)ui_ptr)->address;
(B+ reg->size = ((struct reg_property32 *)ui_ptr)->size;
(B+ } else {
(B+ *reg = *((struct reg_property64 *)ui_ptr);
(B+ }
(B+
(B+ return 0;
(B+}
(B+
(B+static void python_countermeasures(struct device_node *dev,
(B+ unsigned int addr_size_words)
(B+{
(B+ struct reg_property64 reg_struct;
(B+ void __iomem *chip_regs;
(B+ volatile u32 val;
(B+
(B+ if (get_phb_reg_prop(dev, addr_size_words, ®_struct))
(B+ return;
(B+
(B+ /* Python's register file is 1 MB in size. */
(B+ chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
(B+
(B+ /*
(B+ * Firmware doesn't always clear this bit which is critical
(B+ * for good performance - Anton
(B+ */
(B+
(B+#define PRG_CL_RESET_VALID 0x00010000
(B+
(B+ val = in_be32(chip_regs + 0xf6030);
(B+ if (val & PRG_CL_RESET_VALID) {
(B+ printk(KERN_INFO "Python workaround: ");
(B+ val &= ~PRG_CL_RESET_VALID;
(B+ out_be32(chip_regs + 0xf6030, val);
(B+ /*
(B+ * We must read it back for changes to
(B+ * take effect
(B+ */
(B+ val = in_be32(chip_regs + 0xf6030);
(B+ printk("reg0: %x\n", val);
(B+ }
(B+
(B+ iounmap(chip_regs);
(B+}
(B+
(B+void __init init_pci_config_tokens (void)
(B+{
(B+ read_pci_config = rtas_token("read-pci-config");
(B+ write_pci_config = rtas_token("write-pci-config");
(B+ ibm_read_pci_config = rtas_token("ibm,read-pci-config");
(B+ ibm_write_pci_config = rtas_token("ibm,write-pci-config");
(B+}
(B+
(B+unsigned long __devinit get_phb_buid (struct device_node *phb)
(B+{
(B+ int addr_cells;
(B+ unsigned int *buid_vals;
(B+ unsigned int len;
(B+ unsigned long buid;
(B+
(B+ if (ibm_read_pci_config == -1) return 0;
(B+
(B+ /* PHB's will always be children of the root node,
(B+ * or so it is promised by the current firmware. */
(B+ if (phb->parent == NULL)
(B+ return 0;
(B+ if (phb->parent->parent)
(B+ return 0;
(B+
(B+ buid_vals = (unsigned int *) get_property(phb, "reg", &len);
(B+ if (buid_vals == NULL)
(B+ return 0;
(B+
(B+ addr_cells = prom_n_addr_cells(phb);
(B+ if (addr_cells == 1) {
(B+ buid = (unsigned long) buid_vals[0];
(B+ } else {
(B+ buid = (((unsigned long)buid_vals[0]) << 32UL) |
(B+ (((unsigned long)buid_vals[1]) & 0xffffffff);
(B+ }
(B+ return buid;
(B+}
(B+
(B+static int phb_set_bus_ranges(struct device_node *dev,
(B+ struct pci_controller *phb)
(B+{
(B+ int *bus_range;
(B+ unsigned int len;
(B+
(B+ bus_range = (int *) get_property(dev, "bus-range", &len);
(B+ if (bus_range == NULL || len < 2 * sizeof(int)) {
(B+ return 1;
(B+ }
(B+
(B+ phb->first_busno = bus_range[0];
(B+ phb->last_busno = bus_range[1];
(B+
(B+ return 0;
(B+}
(B+
(B+static int __devinit setup_phb(struct device_node *dev,
(B+ struct pci_controller *phb,
(B+ unsigned int addr_size_words)
(B+{
(B+ pci_setup_pci_controller(phb);
(B+
(B+ if (is_python(dev))
(B+ python_countermeasures(dev, addr_size_words);
(B+
(B+ if (phb_set_bus_ranges(dev, phb))
(B+ return 1;
(B+
(B+ phb->arch_data = dev;
(B+ phb->ops = &rtas_pci_ops;
(B+ phb->buid = get_phb_buid(dev);
(B+
(B+ return 0;
(B+}
(B+
(B+static void __devinit add_linux_pci_domain(struct device_node *dev,
(B+ struct pci_controller *phb,
(B+ struct property *of_prop)
(B+{
(B+ memset(of_prop, 0, sizeof(struct property));
(B+ of_prop->name = "linux,pci-domain";
(B+ of_prop->length = sizeof(phb->global_number);
(B+ of_prop->value = (unsigned char *)&of_prop[1];
(B+ memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
(B+ prom_add_property(dev, of_prop);
(B+}
(B+
(B+static struct pci_controller * __init alloc_phb(struct device_node *dev,
(B+ unsigned int addr_size_words)
(B+{
(B+ struct pci_controller *phb;
(B+ struct property *of_prop;
(B+
(B+ phb = alloc_bootmem(sizeof(struct pci_controller));
(B+ if (phb == NULL)
(B+ return NULL;
(B+
(B+ of_prop = alloc_bootmem(sizeof(struct property) +
(B+ sizeof(phb->global_number));
(B+ if (!of_prop)
(B+ return NULL;
(B+
(B+ if (setup_phb(dev, phb, addr_size_words))
(B+ return NULL;
(B+
(B+ add_linux_pci_domain(dev, phb, of_prop);
(B+
(B+ return phb;
(B+}
(B+
(B+static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node
(B*dev, unsigned int addr_size_words)
(B+{
(B+ struct pci_controller *phb;
(B+
(B+ phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller),
(B+ GFP_KERNEL);
(B+ if (phb == NULL)
(B+ return NULL;
(B+
(B+ if (setup_phb(dev, phb, addr_size_words))
(B+ return NULL;
(B+
(B+ phb->is_dynamic = 1;
(B+
(B+ /* TODO: linux,pci-domain? */
(B+
(B+ return phb;
(B+}
(B+
(B+unsigned long __init find_and_init_phbs(void)
(B+{
(B+ struct device_node *node;
(B+ struct pci_controller *phb;
(B+ unsigned int root_size_cells = 0;
(B+ unsigned int index;
(B+ unsigned int *opprop = NULL;
(B+ struct device_node *root = of_find_node_by_path("/");
(B+
(B+ if (ppc64_interrupt_controller == IC_OPEN_PIC) {
(B+ opprop = (unsigned int *)get_property(root,
(B+ "platform-open-pic", NULL);
(B+ }
(B+
(B+ root_size_cells = prom_n_size_cells(root);
(B+
(B+ index = 0;
(B+
(B+ for (node = of_get_next_child(root, NULL);
(B+ node != NULL;
(B+ node = of_get_next_child(root, node)) {
(B+ if (node->type == NULL || strcmp(node->type, "pci") != 0)
(B+ continue;
(B+
(B+ phb = alloc_phb(node, root_size_cells);
(B+ if (!phb)
(B+ continue;
(B+
(B+ pci_process_bridge_OF_ranges(phb, node);
(B+ pci_setup_phb_io(phb, index == 0);
(B+
(B+ if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
(B+ int addr = root_size_cells * (index + 2) - 1;
(B+ mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
(B+ }
(B+
(B+ index++;
(B+ }
(B+
(B+ of_node_put(root);
(B+ pci_devs_phb_init();
(B+
(B+ /*
(B+ * pci_probe_only and pci_assign_all_buses can be set via properties
(B+ * in chosen.
(B+ */
(B+ if (of_chosen) {
(B+ int *prop;
(B+
(B+ prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
(B+ NULL);
(B+ if (prop)
(B+ pci_probe_only = *prop;
(B+
(B+ prop = (int *)get_property(of_chosen,
(B+ "linux,pci-assign-all-buses", NULL);
(B+ if (prop)
(B+ pci_assign_all_buses = *prop;
(B+ }
(B+
(B+ return 0;
(B+}
(B+
(B+struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
(B+{
(B+ struct device_node *root = of_find_node_by_path("/");
(B+ unsigned int root_size_cells = 0;
(B+ struct pci_controller *phb;
(B+ struct pci_bus *bus;
(B+ int primary;
(B+
(B+ root_size_cells = prom_n_size_cells(root);
(B+
(B+ primary = list_empty(&hose_list);
(B+ phb = alloc_phb_dynamic(dn, root_size_cells);
(B+ if (!phb)
(B+ return NULL;
(B+
(B+ pci_process_bridge_OF_ranges(phb, dn);
(B+
(B+ pci_setup_phb_io_dynamic(phb, primary);
(B+ of_node_put(root);
(B+
(B+ pci_devs_phb_init_dynamic(phb);
(B+ phb->last_busno = 0xff;
(B+ bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data);
(B+ phb->bus = bus;
(B+ phb->last_busno = bus->subordinate;
(B+
(B+ return phb;
(B+}
(B+EXPORT_SYMBOL(init_phb_dynamic);
(B+
(B+#if 0
(B+void pcibios_name_device(struct pci_dev *dev)
(B+{
(B+ struct device_node *dn;
(B+
(B+ /*
(B+ * Add IBM loc code (slot) as a prefix to the device names for service
(B+ */
(B+ dn = pci_device_to_OF_node(dev);
(B+ if (dn) {
(B+ char *loc_code = get_property(dn, "ibm,loc-code", 0);
(B+ if (loc_code) {
(B+ int loc_len = strlen(loc_code);
(B+ if (loc_len < sizeof(dev->dev.name)) {
(B+ memmove(dev->dev.name+loc_len+1, dev->dev.name,
(B+ sizeof(dev->dev.name)-loc_len-1);
(B+ memcpy(dev->dev.name, loc_code, loc_len);
(B+ dev->dev.name[loc_len] = ' ';
(B+ dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
(B+ }
(B+ }
(B+ }
(B+}
(B+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
(B+#endif
(B+
(B+static void check_s7a(void)
(B+{
(B+ struct device_node *root;
(B+ char *model;
(B+
(B+ root = of_find_node_by_path("/");
(B+ if (root) {
(B+ model = get_property(root, "model", NULL);
(B+ if (model && !strcmp(model, "IBM,7013-S7A"))
(B+ s7a_workaround = 1;
(B+ of_node_put(root);
(B+ }
(B+}
(B+
(B+/* RPA-specific bits for removing PHBs */
(B+int pcibios_remove_root_bus(struct pci_controller *phb)
(B+{
(B+ struct pci_bus *b = phb->bus;
(B+ struct resource *res;
(B+ int rc, i;
(B+
(B+ res = b->resource[0];
(B+ if (!res->flags) {
(B+ printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
(B+ b->name);
(B+ return 1;
(B+ }
(B+
(B+ rc = unmap_bus_range(b);
(B+ if (rc) {
(B+ printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
(B+ __FUNCTION__, b->name);
(B+ return 1;
(B+ }
(B+
(B+ if (release_resource(res)) {
(B+ printk(KERN_ERR "%s: failed to release IO on bus %s\n",
(B+ __FUNCTION__, b->name);
(B+ return 1;
(B+ }
(B+
(B+ for (i = 1; i < 3; ++i) {
(B+ res = b->resource[i];
(B+ if (!res->flags && i == 0) {
(B+ printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
(B+ __FUNCTION__, b->name);
(B+ return 1;
(B+ }
(B+ if (res->flags && release_resource(res)) {
(B+ printk(KERN_ERR
(B+ "%s: failed to release IO %d on bus %s\n",
(B+ __FUNCTION__, i, b->name);
(B+ return 1;
(B+ }
(B+ }
(B+
(B+ list_del(&phb->list_node);
(B+ if (phb->is_dynamic)
(B+ kfree(phb);
(B+
(B+ return 0;
(B+}
(B+EXPORT_SYMBOL(pcibios_remove_root_bus);
(B+
(B+static void __init pSeries_request_regions(void)
(B+{
(B+ if (!isa_io_base)
(B+ return;
(B+
(B+ request_region(0x20,0x20,"pic1");
(B+ request_region(0xa0,0x20,"pic2");
(B+ request_region(0x00,0x20,"dma1");
(B+ request_region(0x40,0x20,"timer");
(B+ request_region(0x80,0x10,"dma page reg");
(B+ request_region(0xc0,0x20,"dma2");
(B+}
(B+
(B+void __init pSeries_final_fixup(void)
(B+{
(B+ struct pci_dev *dev = NULL;
(B+
(B+ check_s7a();
(B+
(B+ for_each_pci_dev(dev) {
(B+ pci_read_irq_line(dev);
(B+ if (s7a_workaround) {
(B+ if (dev->irq > 16) {
(B+ dev->irq -= 3;
(B+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
(Bdev->irq);
(B+ }
(B+ }
(B+ }
(B+
(B+ phbs_remap_io();
(B+ pSeries_request_regions();
(B+
(B+ pci_addr_cache_build();
(B+}
(B+
(B+/*
(B+ * Assume the winbond 82c105 is the IDE controller on a
(B+ * p610. We should probably be more careful in case
(B+ * someone tries to plug in a similar adapter.
(B+ */
(B+static void fixup_winbond_82c105(struct pci_dev* dev)
(B+{
(B+ int i;
(B+ unsigned int reg;
(B+
(B+ if (!(systemcfg->platform & PLATFORM_PSERIES))
(B+ return;
(B+
(B+ printk("Using INTC for W82c105 IDE controller.\n");
(B+ pci_read_config_dword(dev, 0x40, ®);
(B+ /* Enable LEGIRQ to use INTC instead of ISA interrupts */
(B+ pci_write_config_dword(dev, 0x40, reg | (1<<11));
(B+
(B+ for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
(B+ /* zap the 2nd function of the winbond chip */
(B+ if (dev->resource[i].flags & IORESOURCE_IO
(B+ && dev->bus->number == 0 && dev->devfn == 0x81)
(B+ dev->resource[i].flags &= ~IORESOURCE_IO;
(B+ }
(B+}
(B+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
(B+ fixup_winbond_82c105);
(B
(B-
(BTo unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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