On Wed, 3 Dec 2014, Dave Jones wrote:
> On Wed, Dec 03, 2014 at 09:37:10PM +0100, Thomas Gleixner wrote:
>
> > Right, that resulted in a delta > 0. I have no idea how we could
> > create a negative delta via wrapping the HPET around, i.e. HPET being
> > 96 seconds ahead of TSC.
> >
> > This looks more like a genuine TSC wreckage. So we have these possible
> > causes:
> >
> > 1) SMI
> >
> > 2) Power states
> >
> > 3) Writing to the wrong MSR
> >
> > So I assume that 1/2 are a non issue. They should surface in normal
> > non fuzzed operation as well.
> >
> > Dave, does that TSC unstable thing always happen AFTER you started
> > fuzzing? If yes, what is the fuzzer doing this time?
>
> I've seen it even after doing just a kernel build sometimes, It's
> happened so regularly I've just assumed "the tsc is crap on this box".
>
> On occasion I even see it shortly after boot, while idle.
Can you please provide the cpuinfo flags of that box?
Thanks,
tglx
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