On 2014年11月30日 16:56, Brian Norris wrote:
On Tue, Nov 04, 2014 at 08:47:01PM +0800, Zhou Wang wrote:
Signed-off-by: Zhou Wang <wangzhou....@gmail.com>
---
  .../devicetree/bindings/mtd/hisi504-nand.txt       |   40 ++++++++++++++++++++
  1 file changed, 40 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/mtd/hisi504-nand.txt

diff --git a/Documentation/devicetree/bindings/mtd/hisi504-nand.txt 
b/Documentation/devicetree/bindings/mtd/hisi504-nand.txt
new file mode 100644
index 0000000..c8b3988
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/hisi504-nand.txt
@@ -0,0 +1,40 @@
+Hisilicon Hip04 Soc NAND controller DT binding
+
+Required properties:
+- compatible:          Should be "hisilicon,504-nfc".
+- reg:                 The first contains base physical address and size of
+                       NAND controller's registers. The second contains base
+                       physical address and size of NAND controller's buffer.
+- interrupts:          Interrupt number for nfc.
+- nand-bus-width:      See nand.txt.
+- nand-ecc-mode:       See nand.txt.

Do you support all modes, or just "hw"? Might be worth noting here.


The driver just supports "hw" mode, will modify this.

+- hisi,nand-ecc-bits:  ECC bits type support.
+                 <0>:  none ecc
+                 <1>:  Can correct 1bit per 512byte.
+                 <6>:  Can correct 16bits per 1K byte.

You should re-use the nand-ecc-strength and nand-ecc-step-size
properties here. So you'll support these options:

   nand-ecc-strength=0  nand-ecc-step-size=<don't care>
   nand-ecc-strength=1  nand-ecc-step-size=512
   nand-ecc-strength=16 nand-ecc-step-size=1024

Thanks, will modify this!


+- #address-cells:      partition address, should be set 1.
+- #size-cells:         partition size, should be set 1.
+
+Flash chip may optionally contain additional sub-nodes describing partitions of
+the address space. See partition.txt for more detail.
+
+Example:
+
+       nand: nand@4020000 {
+               compatible = "hisilicon,504-nfc";
+               reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
+               interrupts = <0 379 4>;
+               nand-bus-width = <8>;
+               nand-ecc-mode = "hw";
+               hisi,nand-ecc-bits = <1>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partition@0 {
+                       label = "nand_text";
+                       reg = <0x00000000 0x00400000>;
+               };
+
+               ...
+
+       };

Brian


Thanks,
Zhou Wang

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