On Thu, Nov 06, 2014 at 03:09:06AM +0000, bpqw wrote:
> This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.
> 
> For Micron SPI NOR flash,enabling or disabling quad I/O protocol is controlled
> by EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7.
> When EVCR bit 7 is reset to 0,the SPI NOR flash will operate in quad I/O mode.
> 
> Signed-off-by: bean huo <bean...@micron.com>
> Acked-by: Marek Vasut <ma...@denx.de>
> ---
>  v1-v2:
>       Modified to that capture wait_till_ready()
>       return value,if error,directly return its
>       the value.
>  v2-v3:
>       Directly use the reurning error value of
>       read_reg and write_reg,instead of -EINVAL.
>  v3-v4:
>       Modify commit logs that wraped into 80 columns 
>  v4-v5:
>       Rebuild new patch based on latest linux-mtd

You probably aren't based on l2-mtd.git. Your patch still doesn't build.
I can fix it up if it's easy, but FYI. Still reviewing...

drivers/mtd/spi-nor/spi-nor.c: In function ‘micron_quad_enable’:
drivers/mtd/spi-nor/spi-nor.c:874:2: warning: passing argument 3 of 
‘nor->read_reg’ from incompatible pointer type [enabled by default]
  ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1);
  ^
drivers/mtd/spi-nor/spi-nor.c:874:2: note: expected ‘u8 *’ but argument is of 
type ‘int *’
drivers/mtd/spi-nor/spi-nor.c:891:2: error: implicit declaration of function 
‘wait_till_ready’ [-Werror=implicit-function-declaration]
  ret = wait_till_ready(nor);
  ^
drivers/mtd/spi-nor/spi-nor.c:896:2: warning: passing argument 3 of 
‘nor->read_reg’ from incompatible pointer type [enabled by default]
  ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1);
  ^
drivers/mtd/spi-nor/spi-nor.c:896:2: note: expected ‘u8 *’ but argument is of 
type ‘int *’

Brian
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