>
> On 03/11/14 07:39, Raymond Tan wrote:
> > + pdata->properties->irq = pdev->irq;
> > + pdata->properties->irq_shared = true;
>
> OK I see it.
>
> Thanks.
>
> My question is. How extensively have edge triggered interrupts been tested on
> the GPIO block ?
>
> The BSP reference code is quite explicit about not missing edge interrupts.
>
> Have you tested GPIO input in edge mode ?
We indeed test edge mode. Now all are moved to gpio-dwapb module which has been
accepted by maintainer.
The BSP code doesn't meet the requirement of upstream, so we totally
re-implement this feature in gpio-dwapb.
This patch only passes the necessary parameters and registers the platform
devices.
>
> +irqreturn_t intel_qrk_gpio_isr(int irq, void *dev_id) {
> + irqreturn_t ret = IRQ_NONE;
> + u32 pending = 0, gpio = 0;
> + void __iomem *reg_pending = reg_base + PORTA_INT_STATUS;
> + void __iomem *reg_eoi = reg_base + PORTA_INT_EOI;
> +
> + /* Which pin (if any) triggered the interrupt */
> + while ((pending = ioread32(reg_pending))) {
> + /*
> + * Acknowledge all the asserted GPIO interrupt lines before
> + * serving them, so that we don't lose an edge.
> + * This has only effect on edge-triggered interrupts.
> + */
> + iowrite32(pending, reg_eoi);
> +
> + /* Serve each asserted interrupt */
> + do {
> + gpio = __ffs(pending);
> + generic_handle_irq(
> + gpio_to_irq(INTEL_QRK_GIP_GPIO_BASE + gpio));
> + pending &= ~BIT(gpio);
> + ret = IRQ_HANDLED;
> + } while(pending);
> + }
> +
> + return ret;
> +}
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