On Sat, Oct 18, 2014 at 02:23:35PM -0400, David Miller wrote:
> From: David Miller <da...@davemloft.net>
> Date: Sat, 18 Oct 2014 13:59:07 -0400 (EDT)
>
> > I don't want to define the array size of the fpregs save area
> > explicitly and thereby placing an artificial limit there.
>
> Nevermind, it seems we have a hard limit of 7 FPU save areas anyways.
>
> Meelis, please try this patch:
>
> diff --git a/arch/sparc/include/asm/thread_info_64.h
> b/arch/sparc/include/asm/thread_info_64.h
> index f85dc85..cc6275c 100644
> --- a/arch/sparc/include/asm/thread_info_64.h
> +++ b/arch/sparc/include/asm/thread_info_64.h
> @@ -63,7 +63,8 @@ struct thread_info {
> struct pt_regs *kern_una_regs;
> unsigned int kern_una_insn;
>
> - unsigned long fpregs[0] __attribute__ ((aligned(64)));
> + unsigned long fpregs[(7 * 256) / sizeof(unsigned long)]
This part:
> + __attribute__ ((aligned(64)));
Could be written as __aligned(64)
Sam
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