Hi Addy, On Tuesday 14 October 2014 at 14:09:21, Addy Ke wrote: > As show in I2C specification: > - Standard-mode: the minimum HIGH period of the scl clock is 4.0us > the minimum LOW period of the scl clock is 4.7us > - Fast-mode: the minimum HIGH period of the scl clock is 0.6us > the minimum LOW period of the scl clock is 1.3us > > I have measured i2c SCL waveforms in fast-mode by oscilloscope > on rk3288-pinky board. the LOW period of the scl clock is 1.3us. > It is so critical that we must adjust LOW division to increase > the LOW period of the scl clock. > > Thanks Doug for the suggestion about division formulas. > > Tested-by: Heiko Stuebner <he...@sntech.de> > Reviewed-by: Doug Anderson <diand...@chromium.org> > Tested-by: Doug Anderson <diand...@chromium.org> > Signed-off-by: Addy Ke <addy...@rock-chips.com>
Reviewed-by: Max Schwarz <max.schw...@online.de> Tested-by: Max Schwarz <max.schw...@online.de> Cheers, Max -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
