Bartlomiej Zolnierkiewicz wrote:
>
> Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation
> when topology is read from DT") fixed GIC driver to filter cluster ID
> from values returned by cpu_logical_map() for SoCs having registers
> mapped without per-CPU banking making it is possible to add CPU nodes
> for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also
> required by future changes adding initialization of cpuidle states in
> Exynos cpuidle driver through DT.
>
> Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC).
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnier...@samsung.com>
> ---
> Based on for-next branch of linux-samsung.git tree.
>
> v3:
> - refreshed on top of Kukjin's tree
>
> v2:
> - match the unit-address with the reg
>
> arch/arm/boot/dts/exynos4210.dtsi | 17 +++++++++++++++++
> arch/arm/boot/dts/exynos4212.dtsi | 17 +++++++++++++++++
> arch/arm/boot/dts/exynos4412.dtsi | 29 +++++++++++++++++++++++++++++
> 3 files changed, 63 insertions(+)
Thanks for re-spin and looks good to me.
Applied.
Thanks,
Kukjin
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