On Fri, 5 Sep 2014, Andrew Bresticker wrote:
> static void gic_mask_irq(struct irq_data *d)
> {
> - GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
> + unsigned int irq = d->irq - gic_irq_base;
> +
> + if (gic_is_local_irq(irq)) {
> + GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_RMASK),
> + 1 << GIC_INTR_BIT(gic_hw_to_local_irq(irq)));
> + } else {
> + GIC_CLR_INTR_MASK(irq);
> + }
> }
>
> static void gic_unmask_irq(struct irq_data *d)
> {
> - GIC_SET_INTR_MASK(d->irq - gic_irq_base);
> + unsigned int irq = d->irq - gic_irq_base;
> +
> + if (gic_is_local_irq(irq)) {
> + GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_SMASK),
> + 1 << GIC_INTR_BIT(gic_hw_to_local_irq(irq)));
> + } else {
> + GIC_SET_INTR_MASK(irq);
> + }
Why are you adding a conditional in all these functions instead of
having two interrupt chips with separate callbacks and irqdata?
And looking at GIC_SET_INTR_MASK(irq) makes me shudder even more. The
whole thing can be replaced with the generic interrupt chip functions.
If you set it up proper, then there is not a single conditional or
runtime calculation of bitmasks, address offsets etc.
Thanks,
tglx
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