On Tue, Sep 02, 2014 at 12:04:45PM -0700, Guenter Roeck wrote:
> I provided qemu images and instructions as follows.
> http://server.roeck-us.net/qemu/mipsel/ MIPS 32 bit, little
> endian
> http://server.roeck-us.net/qemu/mips64el/ MIPS 64 bit, little
> endian
>
> Let me know if you also need big endian images.
Thanks! Does the below work? It appears to work for the mips64 build I did.
I'll send a proper patch tomorrow; sleep time :-)
---
diff --git a/arch/mips/configs/malta_defconfig
b/arch/mips/configs/malta_defconfig
index e18741e..869efe7 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -441,3 +441,6 @@ CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC16=m
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CPU_MIPS64_R1=y
+CONFIG_64BIT=y
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 476fe3b..f3ee721 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -93,7 +93,7 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *
v) \
" " #asm_op " %0, %1, %3 \n"
\
" sc %0, %2 \n"
\
" beqzl %0, 1b \n"
\
- " addu %0, %1, %3 \n"
\
+ " " #asm_op " %0, %1, %3 \n"
\
" .set mips0 \n"
\
: "=&r" (result), "=&r" (temp), "+m" (v->counter)
\
: "Ir" (i));
\
@@ -111,7 +111,7 @@ static __inline__ int atomic_##op##_return(int i, atomic_t
* v) \
: "Ir" (i));
\
} while (unlikely(!result));
\
\
- result = temp + i;
\
+ result = temp; result c_op i;
\
} else {
\
unsigned long flags;
\
\
@@ -387,7 +387,7 @@ static __inline__ long atomic64_##op##_return(long i,
atomic64_t * v) \
: "memory");
\
} while (unlikely(!result));
\
\
- result = temp + i;
\
+ result = temp; result c_op i;
\
} else {
\
unsigned long flags;
\
\
--
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