On Thu, Mar 17, 2005 at 03:34:49PM +0100, moreau francis wrote: > But why should I "degrade" my UART because some 8250 > devices have > poor hardware implementation. Maybe we should limit > their tx fifo to > one byte when rts/cts flow control is enabled...
Because you don't actually understand what "hardware" and "software" flow control refer to. It doesn't refer to the way the control is derived, as your messages appear to imply. What it does refer to is the *signalling* method: * Hardware flow control is performed using the RTS and CTS signals. These signals may be software controlled. * Software flow control means sending an XOFF character to stop transmission, and another character to start transmission. In both flow control scenarios, it is very common that there may be some latency between the reception of the "stop transmission" signal and the transmission actually stopping. This is precisely why the 8250 UARTs which do have "automatic flow control" incorporated into the receiver have *large* FIFOs with programmable trigger levels - it allows for the latency at the transmission end. If you want it to be immediate, then I'm afraid you're going to have a relatively hard time, with compatibility problems with various systems. You can't really dictate to people that they must turn off the FIFOs on their UARTs for your product to work. (Well, you can, but _you_ would have to support them.) -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: 2.6 Serial core - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
