From: Vincent Minet <[email protected]>

3.12-stable review patch.  If anyone has any objections, please let me know.

===============

commit 179e8471673ce0249cd4ecda796008f7757e5bad upstream.

Ensure that cpu->cpu is set before writing MSR_IA32_PERF_CTL during CPU
initialization. Otherwise only cpu0 has its P-state set and all other
cores are left with their values unchanged.

In most cases, this is not too serious because the P-states will be set
correctly when the timer function is run.  But when the default governor
is set to performance, the per-CPU current_pstate stays the same forever
and no attempts are made to write the MSRs again.

Signed-off-by: Vincent Minet <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
Signed-off-by: Jiri Slaby <[email protected]>
---
 drivers/cpufreq/intel_pstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index d5dc567efd96..f033fadb58e6 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -550,6 +550,7 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
 
        cpu = all_cpu_data[cpunum];
 
+       cpu->cpu = cpunum;
        intel_pstate_get_cpu_pstates(cpu);
        if (!cpu->pstate.current_pstate) {
                all_cpu_data[cpunum] = NULL;
@@ -557,7 +558,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
                return -ENODATA;
        }
 
-       cpu->cpu = cpunum;
        cpu->pstate_policy =
                (struct pstate_adjust_policy *)id->driver_data;
        init_timer_deferrable(&cpu->timer);
-- 
2.0.0

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