Hi,
On Mon, Apr 28, 2014 at 06:17:08PM +0200, Alexandre Belloni wrote:
> This adds a generic PWM framework driver for the PWM controller
> found on Allwinner SoCs.
>
> Signed-off-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
> Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
> ---
> drivers/pwm/Kconfig | 9 ++
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-sunxi.c | 345
> ++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 355 insertions(+)
> create mode 100644 drivers/pwm/pwm-sunxi.c
>
> diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
> index 5b34ff29ea38..178b017be827 100644
> --- a/drivers/pwm/Kconfig
> +++ b/drivers/pwm/Kconfig
> @@ -217,6 +217,15 @@ config PWM_SPEAR
> To compile this driver as a module, choose M here: the module
> will be called pwm-spear.
>
> +config PWM_SUNXI
> + tristate "Allwinner PWM support"
> + depends on ARCH_SUNXI || COMPILE_TEST
> + help
> + Generic PWM framework driver for Allwinner SoCs.
> +
> + To compile this driver as a module, choose M here: the module
> + will be called pwm-sunxi.
> +
> config PWM_TEGRA
> tristate "NVIDIA Tegra PWM support"
> depends on ARCH_TEGRA
> diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
> index e57d2c38a794..39997ea2e276 100644
> --- a/drivers/pwm/Makefile
> +++ b/drivers/pwm/Makefile
> @@ -19,6 +19,7 @@ obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
> obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o
> obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
> obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
> +obj-$(CONFIG_PWM_SUNXI) += pwm-sunxi.o
> obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
> obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
> obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o
> diff --git a/drivers/pwm/pwm-sunxi.c b/drivers/pwm/pwm-sunxi.c
> new file mode 100644
> index 000000000000..0f2d65e8976b
> --- /dev/null
> +++ b/drivers/pwm/pwm-sunxi.c
> @@ -0,0 +1,345 @@
> +/*
> + * Driver for Allwinner Pulse Width Modulation Controller
> + *
> + * Copyright (C) 2014 Alexandre Belloni
> <alexandre.bell...@free-electrons.com>
> + *
> + * Licensed under GPLv2.
> + */
> +
> +#include <linux/bitops.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pwm.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/slab.h>
> +
> +#define PWM_CTRL_REG 0x0
> +
> +#define PWM_CH_PRD_BASE 0x4
> +#define PWM_CH_PRD_OFF 0x4
> +#define PWM_CH_PRD(x) (PWM_CH_PRD_BASE + PWM_CH_PRD_OFF * (x))
> +
> +#define PWMCH_OFFSET 15
> +#define PWM_PRESCAL_MASK GENMASK(3,0)
> +#define PWM_PRESCAL_OFF 0
> +#define PWM_EN BIT(4)
> +#define PWM_ACT_STATE BIT(5)
> +#define PWM_CLK_GATING BIT(6)
> +#define PWM_MODE BIT(7)
> +#define PWM_PULSE BIT(8)
> +#define PWM_BYPASS BIT(9)
> +
> +#define PWM_RDY_BASE 28
> +#define PWM_RDY_OFF 1
> +#define PWM_RDY(x) BIT(PWM_RDY_BASE + PWM_RDY_OFF * (x))
> +
> +#define PWM_PRD_ACT_MASK 0xFF
> +#define PWM_PRD(x) ((x - 1) << 16)
> +#define PWM_PRD_MASK 0xFF
> +
> +#define BIT_CH(bit, chan) (bit << (chan * PWMCH_OFFSET))
> +
> +u32 prescal_table[] = { 120, 180, 240, 360, 480, 0, 0, 0,
> + 12000, 24000, 36000, 48000, 72000,
> + 0, 0, 1 };
> +
> +struct sunxi_pwm_data {
> + bool has_rdy;
> +};
> +
> +struct sunxi_pwm_chip {
> + struct pwm_chip chip;
> + struct clk *clk;
> + void __iomem *base;
> + struct mutex ctrl_lock;
> + const struct sunxi_pwm_data *data;
> +};
> +
> +#define to_sunxi_pwm_chip(chip) container_of(chip, struct sunxi_pwm_chip,
> chip)
> +
> +static inline u32 sunxi_pwm_readl(struct sunxi_pwm_chip *chip,
> + unsigned long offset)
> +{
> + return readl_relaxed(chip->base + offset);
> +}
> +
> +static inline void sunxi_pwm_writel(struct sunxi_pwm_chip *chip,
> + unsigned long offset, unsigned long val)
> +{
> + writel_relaxed(val, chip->base + offset);Actually, this won't work with COMPILE_TEST, since the *_relaxed functions are not defined for all the architectures. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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