* Joel Fernandes <jo...@ti.com> [140422 12:41]:
> On my DRA7 system, when the kernel is built in Thumb-2 mode, the secondary CPU
> (Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
> seems to be because the CPU is in ARM mode once the ROM hands over control to
> the kernel.  Switch to Thumb-2 mode if required once the kernel is control of
> secondary CPU. On OMAP4 on the other hand, it appears to be in Thumb-2 mode on
> entry so this is not required and SMP boot works as is.
> 
> Also corrected a spurious '+' and updated copyright information.
> 
> Cc: Santosh Shilimkar <santosh.shilim...@ti.com>
> Cc: Russell King <li...@arm.linux.org.uk>
> Cc: Nishanth Menon <n...@ti.com>
> Cc: Tony Lindgren <t...@atomide.com>
> Tested-by: Nishanth Menon <n...@ti.com>
> Acked-by: Santosh Shilimkar <santosh.shilim...@ti.com>
> Signed-off-by: Joel Fernandes <jo...@ti.com>

Thanks applying into omap-for-v3.15/fixes-v2.

Tony
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