On 04/17/2014 11:06 AM, Maxime Ripard wrote:
Hi everyone,
This patchset enables support for the High Speed Timer IP found in the
Allwinner A31 SoCs.
These timers are asserted in reset, and are not associated with any
struct device, so we also add a small helper to the reset framework
along the way to be able to retrieve the reset controller from the
device tree directly.
Thanks,
Maxime
Changes from v2:
- Rebased on top of 3.15-rc1
Changes from v1:
- Rebased on top of 3.14-rc1 and reset/for_3.15
Maxime Ripard (2):
clocksource: sun5i: Add support for reset controller
ARM: sun6i: a31: Add support for the High Speed Timers
.../devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt | 4 ++++
arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++++++++++
drivers/clocksource/timer-sun5i.c | 6 ++++++
3 files changed, 21 insertions(+)
Applied for 3.16
Thanks
-- Daniel
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