On 4/17/2014 9:44 AM, Will Deacon wrote:
> write{b,w,l,q}_relaxed are implemented by some architectures in order to
> permit memory-mapped I/O accesses with weaker barrier semantics than the
> non-relaxed variants.
>
> This patch adds dummy macros for the write accessors to tile, in the
> same vein as the dummy definitions for the relaxed read accessors.
>
> Cc: Chris Metcalf <cmetc...@tilera.com>
> Signed-off-by: Will Deacon <will.dea...@arm.com>
> ---
> arch/tile/include/asm/io.h | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Chris Metcalf <cmetc...@tilera.com>
--
Chris Metcalf, Tilera Corp.
http://www.tilera.com
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