On Tue, 18 Mar 2014, Marc Kleine-Budde wrote:
> On 03/18/2014 06:19 PM, Thomas Gleixner wrote:
> > The hardware has two message control interfaces, but the code only
> > uses the first one. So on SMP the following can be observed:
> >
> > CPU0 CPU1
> > rx_poll()
> > write IF1 xmit()
> > write IF1
> > write IF1
> >
> > That results in corrupted message object configurations. The TX/RX is
> > not globally serialized it's only serialized on a core.
> >
> > Simple solution: Let RX use IF1 and TX use IF2 and all is good.
>
> Do both c_can and d_can have two control interfaces?
According to the manual it has.
Thanks,
tglx
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