On Mon, 2014-03-03 at 08:07PM +0100, Gerhard Sittig wrote:
> On Mon, Mar 03, 2014 at 09:35 -0800, Sören Brinkmann wrote:
> >
> > It would be nice if we could use the logic provided in the mux, div etc
> > primitives independently of how the HW is accessed and what is
> > necessary to shift and mask those register values around, right? I
> > mean, at then end we want to model a clk-(div|mux) and not a
> > clk-(div|mux) which has only a single, memory-mapped control register,
> > that does not overlap with other things, ...
>
> Did you lookup the ll_ops discussion in the thread that
> originated from
> http://article.gmane.org/gmane.linux.ports.arm.kernel/289895 and
> did you see the outlined logic in
> http://article.gmane.org/gmane.linux.ports.arm.omap/109233 and
> http://article.gmane.org/gmane.linux.ports.arm.omap/109381 ?
>
> Support for regmap access instead of mere MMIO was one of the
> things you could do with this approach. You appear to be in the
> situation where you need such an extension (or something similar,
> but you really should look into the ll_ops thing).
Thanks for those pointer, I have some reading to do. That seems to
go into the right direction. What is the status of those patches?
Are they already merged or actively worked on?
Thanks,
Sören
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