From: Geert Uytterhoeven <geert+rene...@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+rene...@linux-m68k.org>
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a90106e96c..5d53def10c42 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,7 +144,7 @@
renesas,function = "mmc1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -164,7 +164,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c396afea..bc652a2848e7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -23,6 +23,7 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ spi0 = &qspi;
};
cpus {
@@ -753,7 +754,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
--
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