On Fri, Jan 28, 2005 at 11:41:16AM -0800, Jesse Barnes wrote: > Yeah, I think I understand. We could probably do the same thing on sn2 > as you do on parisc--add a 'segment 0' offset to the port so that it's routed > correctly. I think that's a little less flexible than adding a new resource > though, since it makes it harder for drivers to support more than one device > or devices on non-segment 0 busses.
To be clear, the parisc code defines this in include/asm-parisc/pci.h: #define HBA_PORT_SPACE_BITS 16 #define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS) and PCI_PORT_HBA gets used in arch/parisc/kernel/pci.c. Offhand, I don't know if ia64 has the equivalent. But it sounds like it might need it. grant - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
