From: Jeff Kirsher <jeffrey.t.kirs...@intel.com> Date: Sat, 28 Dec 2013 04:36:13 -0800
> Add missing PCI bus link speed 8.0 GT/s and bus link widths of > x1, x2, x4 and x8. > > CC: <linux-kernel@vger.kernel.org> > Signed-off-by: Jeff Kirsher <jeffrey.t.kirs...@intel.com> Can a PCI person please ACK this? This is a prerequisite for some networking driver changes Jeff would like to push to me. Thanks. > --- > include/uapi/linux/pci_regs.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index 4a98e85..c870c2a 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -489,7 +489,12 @@ > #define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ > #define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */ > #define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */ > +#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */ > #define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ > +#define PCI_EXP_LNKSTA_NLW_X1 0x0010 /* Current Link Width x1 */ > +#define PCI_EXP_LNKSTA_NLW_X2 0x0020 /* Current Link Width x2 */ > +#define PCI_EXP_LNKSTA_NLW_X4 0x0040 /* Current Link Width x4 */ > +#define PCI_EXP_LNKSTA_NLW_X8 0x0080 /* Current Link Width x8 */ > #define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ > #define PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */ > #define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */ > -- > 1.8.3.1 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
