Jeff,
The things are pretty simple (HZ - in real should be "Hz", cause HZ are
fixed for Alpha, HZ = 1024 Hz) :
Hz = cc / calibration_time
cc == rpcc() at end - rpcc() at begin
calibration_time = (CLOCK_TICK_RATE / CALIBRATE_LATCH).
So there is nothing wrong - clock ticks with CLOCK_TICK_RATE and we've a
divisor equal to CALIBRATE_LATCH. So the time interval elapses after
(CLOCK_TICK_RATE / CALIBRATE_LATCH) seconds and the CPU performs 'cc'
cycles.
That's all. And these really works. ;-))
About x86 style code - don't forget what LATCH defined as follows in
linux/timex.h:
#define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) /* For divider */
Regards,
Oleg.
> Oleg,
>
> How is this relative to HZ, when you remove all references to HZ?
>
> > -#define CALIBRATE_LATCH (52 * LATCH)
> > -#define CALIBRATE_TIME (52 * 1000020 / HZ)
> > +#define CALIBRATE_LATCH 0xffff
> [...]
> > + /* and the final result in HZ */
> > + return ((unsigned long)cc * CLOCK_TICK_RATE) / CALIBRATE_LATCH;
>
> and in asm-alpha/timex.h,
> > #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
>
> --
> Jeff Garzik | Thalidomide, eh?
> Building 1024 | So you're saying the eggplant has an accomplice?
> MandrakeSoft |
>
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