beh...@converseincode.com writes:
> From: Behan Webster <beh...@converseincode.com>
>
> The existing code uses named registers to get the value of the stack pointer.
> The new current_stack_pointer macro is more readable and allows for a central
> portable implementation of how to get the stack pointer with ASM. This change
> supports being able to compile the kernel with both gcc and Clang.
>
> Signed-off-by: Mark Charlebois <charl...@gmail.com>
> Signed-off-by: Behan Webster <beh...@converseincode.com>
> Reviewed-by: Jan-Simon Möller <dl...@gmx.de>
> ---
> arch/arm/include/asm/percpu.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
> index 209e650..629a975 100644
> --- a/arch/arm/include/asm/percpu.h
> +++ b/arch/arm/include/asm/percpu.h
> @@ -30,14 +30,14 @@ static inline void set_my_cpu_offset(unsigned long off)
> static inline unsigned long __my_cpu_offset(void)
> {
> unsigned long off;
> - register unsigned long *sp asm ("sp");
> + unsigned long sp = current_stack_pointer;
>
> /*
> * Read TPIDRPRW.
> * We want to allow caching the value, so avoid using volatile and
> * instead use a fake stack read to hazard against barrier().
> */
> - asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (*sp));
> + asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) : "Q" (sp));
This doesn't do quite the same thing. The existing code pretends to
read something from the stack in order to create a barrier of some
sort. Your new code stores the value of the stack pointer to a location
on the stack for consumption by the "Q" memory constraint. This store
is not necessary and should preferably be avoided.
--
Måns Rullgård
m...@mansr.com
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