Hi,
Reading through arch/i386/kernel/setup.c in 2.4.5, I noticed that the code
which sets x86_cache_size sets it to the size of the chip's L2 cache if
present.
Which is fine for everything except the Athlon/Duron, which have exclusive
L1/L2 caches, so surely they should be added together in this case to give
the total cache size? Or am I just missing something stupid?
--- arch/i386/kernel/setup.c.orig Sun Jun 3 21:49:45 2001
+++ arch/i386/kernel/setup.c Sun Jun 3 22:16:58 2001
@@ -1098,7 +1098,15 @@
if ( l2size == 0 )
return; /* Again, no L2 cache is possible */
- c->x86_cache_size = l2size;
+ /*
+ * Athlon/Duron have exclusive L1/L2 cache, so sum them,
+ * for everyone else set cache size to be L2 only.
+ */
+ if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 6) {
+ c->x86_cache_size += l2size;
+ } else {
+ c->x86_cache_size = l2size;
+ }
printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
l2size, ecx & 0xFF);
--
James Slater
[EMAIL PROTECTED]
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