On Wed, Jul 24, 2013 at 12:03:20PM -0400, Prarit Bhargava wrote:
> +/*
> + * TSC can have non-zero values at boot time on Intel Xeon E5 (family 6,
> + * model 45) aka "SandyBridge" processors. This is documented in the
> + * Errata for the processors as BT81. As a result, we need to snapshot
> + * the TSC's initial value to avoid calculation overflows in the conversions
> + * of cycles to nanoseconds.
> + */
> +unsigned long long tsc_initial_value;
> +
> /*
> * Scheduler clock - returns current time in nanosec units.
> */
> @@ -979,6 +989,9 @@ void __init tsc_init(void)
> return;
> }
>
> + tsc_initial_value = get_cycles();
> + pr_info("TSC: tsc initial value = %lld\n", tsc_initial_value);
> +
And we probably don't need that info on processors unaffected by the
erratum...
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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