On Wed, Jul 03, 2013 at 10:15:11PM +0200, Wolfram Sang wrote: > > CCing Mika and Christian. > > On Fri, Jun 21, 2013 at 03:05:28PM +0800, Chew Chiau Ee wrote: > > From: Chew, Chiau Ee <chiau.ee.c...@intel.com> > > > > If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, > > the Designware I2C controller doesn't generate RESTART unless user > > specifically requests it by setting RESTART bit in IC_DATA_CMD register. > > > > Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from > > hardware register, we must always manually set the restart bit between > > messages. > > > > Signed-off-by: Chew, Chiau Ee <chiau.ee.c...@intel.com> > > How come restart has worked before? Or did it not?
> It works fine. However IC_EMPTYFIFO_HOLD_MASTER_EN=1 makes a difference. We > had similar thing with the STOP that was fixed previously. >If I understand the dw i2c databook right, RESTART is only issued if the >transfer direction changes. So if you have two or more consecutive transfers >that have the same direction (not sure how common that is) there is no RESTART >between them unless >DW_IC_CON_RESTART_EN is set. >Chiau Ee, does this fix a real problem? Yes, it fixed a problem in one of our use case. we have a use case whereby the control path of the audio codec is using I2C bus. During our validation based on that use case, we observed there is issue with back-to-back message transfer if this fix is not being added. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
