Hi, I noticed that when building a kernel with CONFIG_PCI_DIRECT and not CONFIG_PCI_BIOS, the kernel doesn't detect any PCI bus when runing on a STPC embeded CPU. The STPC include a PCI chipset but the configuration methods usednin the kernel does not seems to match the STPC docs. The STPC use 0xCF8 and 0xCFC registers to access PCI configuration space. This seems to match the code of pci_conf1_read_config_byte but the sanity_check fail pci_check_direct. The fact is that the north bridge in the STPC have a class code of 0, so is not detected as a host bridge. For my own tests i've removed the sanity check and so i get the following result in /proc/pci: PCI devices found: Bus 0, device 11, function 0: Non-VGA unclassified device: PCI device 100e:0564 (Weitek) (rev 0). Bus 0, device 12, function 0: ISA bridge: PCI device 100e:55cc (Weitek) (rev 0). Bus 0, device 12, function 1: IDE interface: PCI device 100e:55cc (Weitek) (rev 0). I/O at 0xfc00 [0xfc07]. I/O at 0xfc20 [0xfc23]. I/O at 0xfc40 [0xfc47]. I/O at 0xfc60 [0xfc63]. I/O at 0xfc80 [0xfc8f]. I've seen some fixup functions that seems to correct some IDs. I guess in my case I would need one to correct the device CLASS for the north bridge. Is that correct ? Thanks. -- Fabrice Gautier <[EMAIL PROTECTED]> - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/