+/* + * Indicates MCA banks controlled by the current cpu for CMCI. Note that this + * can change when a cpu is offlined or brought online since some MCA banks + * are shared across cpus. When a cpu is offlined, cmci_clear() disables CMCI + * on all banks owned by the cpu and clears this bitfield. At this point, + * cmci_rediscover() kicks in and a different cpu may end up taking + * ownership of some of the shared MCA banks that were previously owned + * by the offlined cpu. + */ static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
Maybe an extra sentence or two at the beginning to say *why* we need this. E.g. /* * CMCI can be delivered to multiple cpus that share a machine check bank * so we need to designate a single cpu to process errors logged in each bank * in the interrupt handler (otherwise we would have many races and potential * double reporting of the same error. */ ... -Tony
