This patch adds pcie controller node for exynos5440-ssdk5440,
and also adds a phandle for pin controller node.
Signed-off-by: Jingoo Han <jg1....@samsung.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
arch/arm/boot/dts/exynos5440-ssdk5440.dts | 8 ++++++++
arch/arm/boot/dts/exynos5440.dtsi | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index f32cd77..ede7727 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -65,4 +65,12 @@
clock-frequency = <50000000>;
};
};
+
+ pcie@290000 {
+ reset-gpio = <&pin_ctrl 5 0>;
+ };
+
+ pcie@2a0000 {
+ reset-gpio = <&pin_ctrl 22 0>;
+ };
};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
index 1ac4f5b..ff7f5d8 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -126,7 +126,7 @@
clock-names = "spi", "spi_busclk0";
};
- pinctrl {
+ pin_ctrl: pinctrl {
compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>;
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
--
1.7.10.4
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