On Fri, Jun 7, 2013 at 6:02 AM, Xiang Wang <wangx...@gmail.com> wrote: > 2013/6/6 Andy Shevchenko <andy.shevche...@gmail.com>: >> On Thu, Jun 6, 2013 at 6:09 AM, Xiang Wang <wangx...@gmail.com> wrote:
[] >>> 2. DMA controller handles trailing bytes for us. >>> This is the case I mentioned in my previous email. "When a timed-out >>> event occurs in peripheral device, it will notify DMA controller and >>> DMA controller will send out a End of Receive interrupt" >>> I think we should know how many residual bytes in this case even the >>> DMA status is DMA_SUCCESS. >> >> I'm still not convinced that you have implement such algorithm. Anyway, >> if I got it correctly you have something like "Receive FIFO Occupancy >> Register (FOR)" in UART. When you got timeout interrupt, you may get >> residue and value from FOR, sum them, program DMA to transfer the >> trailing bytes. >> What did I miss? > This case is another working mode of peripheral device (e.g. UART). If > we configure UART to work in this mode, the hardware(DMA controller > and UART controller) will deal with the trailing bytes for us. > The workflow is likely to be: > a. When timeout occurs in UART, it notifies DMA controller to move the > trailing bytes in UART FIFO. (software transparent) > b. After DMA finishes moving all bytes in UART FIFO, it will send out > an End Of Receive(EOR) interrupt. > So in this case, software sees an EOR interrupt from DMA controller > instead of an Timeout Interrupt from UART controller. Thanks for explanation. It's quite good your hw could manage such cases, though I thing it's wrong to have residue great than 0 and DMA_SUCCESS as a status in the driver. So, if Vinod, Dan, or any experienced developer is okay with it, I'm okay too. -- With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
