Hi All,
For micron M25P80 parts there is a mix of naming conventions in the
device table:
/* Micron */
{ "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) },
{ "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, 0) },
{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
n25q128 has a11 and a13 variants, while 256 does not. Should this be
consistent across parts? If so should we adopt Liming Wangs "axx"
precedent universally? Here is a hunk from Ed Maste that applies the
relevant change to QEMU (currently on list) that would be nice to
merge. Can we fix this Linux side in similar fashion?
/* Micron */
- { INFO("n25q032a", 0x20bb16, 0, 64 << 10, 64, ER_4K) },
- { INFO("n25q128a11", 0x20bb18, 0, 64 << 10, 256, 0) },
- { INFO("n25q128a13", 0x20ba18, 0, 64 << 10, 256, 0) },
- { INFO("n25q256a", 0x20ba19, 0, 64 << 10, 512, ER_4K) },
+ { INFO("n25q032a11", 0x20bb16, 0, 64 << 10, 64, ER_4K) },
+ { INFO("n25q032a13", 0x20ba16, 0, 64 << 10, 64, ER_4K) },
+ { INFO("n25q064a11", 0x20bb17, 0, 64 << 10, 128, ER_4K) },
+ { INFO("n25q064a13", 0x20ba17, 0, 64 << 10, 128, ER_4K) },
+ { INFO("n25q128a11", 0x20bb18, 0, 64 << 10, 256, ER_4K) },
+ { INFO("n25q128a13", 0x20ba18, 0, 64 << 10, 256, ER_4K) },
+ { INFO("n25q256a11", 0x20bb19, 0, 64 << 10, 512, ER_4K) },
+ { INFO("n25q256a13", 0x20ba19, 0, 64 << 10, 512, ER_4K) },
Regards,
Peter
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