On Wed, 2013-05-15 at 16:40 +0800, Huang Shijie wrote: > + * @ecc_strength: [INTERN] ECC correctability from the datasheet. > + * Minimum amount of bit errors per @ecc_step guaranteed to > + * be correctable. If unknown, set to zero. > + * @ecc_step: [INTERN] ECC step required by the @ecc_strength, > + * also from the datasheet. It is the recommended ECC > step > + * size, if known; if unknown, set to zero.
Here and in other places you talk about "datasheet". Do you assume that the real ECC strength/step used by NAND chips may be different? Or you assume it must be the same? -- Best Regards, Artem Bityutskiy -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
