> > @@ -52,17 +52,12 @@
> >
> > #include "kstack.h"
> >
> > -static void sparc64_yield(int cpu)
> > +/* Idle loop support on sparc64. */
> > +void arch_cpu_idle(void)
> > {
> > if (tlb_type != hypervisor) {
> > touch_nmi_watchdog();
> > - return;
> > - }
> > -
> > - clear_thread_flag(TIF_POLLING_NRFLAG);
> > - smp_mb__after_clear_bit();
> > -
> > - while (!need_resched() && !cpu_is_offline(cpu)) {
> > + } else {
> > unsigned long pstate;
> >
> > /* Disable interrupts. */
> > @@ -73,7 +68,7 @@ static void sparc64_yield(int cpu)
> > : "=&r" (pstate)
> > : "i" (PSTATE_IE));
> >
> > - if (!need_resched() && !cpu_is_offline(cpu))
> > + if (!need_resched() && !cpu_is_offline(smp_processor_id()))
> > sun4v_cpu_yield();
> >
> > /* Re-enable interrupts. */
> > @@ -84,36 +79,16 @@ static void sparc64_yield(int cpu)
> > : "=&r" (pstate)
> > : "i" (PSTATE_IE));
> > }
> > -
> > - set_thread_flag(TIF_POLLING_NRFLAG);
> > + local_irq_enable();
> > }
>
> Nitpick: you can probably move the local_irq_enable() to the
> 'if' block, since the else block already has assembly code to enable
> the interrupts. But anyway its up to you.
I think not.
local_irq_disable writes 0 to the PIL register,
whereas the above code set the IE (Interrupt enable) bit to 0.
So the implementations differs - and I think there is a good
reason for being so.
But this is the part where I refer to that I am fooling around
in code that I do not understand.
I re-checked the SPARC V9 manual - but I did not within a few minutes
reading understand what is the difference between the twoo.
Sam
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