Le 04/07/13 13:09, Sebastian Hesselbarth a écrit :
Marvell mdio driver uses internal registers that can be clock gated on
some SoCs. This patch just adds optional clock handling, to allow to pass
and enable the corresponding clock.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Looks good to me:
Acked-by: Florian Fainelli <flor...@openwrt.org>
--
Florian
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