On Tue, Mar 05, 2013 at 10:30:01PM +0000, Dan Williams wrote:
>
>
> On 2/26/13 8:20 AM, "Dave Jiang" <dave.ji...@intel.com> wrote:
>
> >Looks like only the RAID channels are allowed to have irq coalescing
> >support
> >in the existing code. Fixing that. The ioat3 cleanup code can handle
> >memcpy
> >ops anyways
> >
> >Signed-off-by: Dave Jiang <dave.ji...@intel.com>
Applied thanks
> >---
> > drivers/dma/ioat/dma_v3.c | 12 +++---------
> > 1 file changed, 3 insertions(+), 9 deletions(-)
> >
> >diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
> >index 47588dc..368a184 100644
> >--- a/drivers/dma/ioat/dma_v3.c
> >+++ b/drivers/dma/ioat/dma_v3.c
> >@@ -1268,15 +1268,9 @@ int __devinit ioat3_dma_probe(struct
> >ioatdma_device *device, int dca)
> > }
> >
> >
> >- if (is_raid_device) {
> >- dma->device_tx_status = ioat3_tx_status;
> >- device->cleanup_fn = ioat3_cleanup_event;
> >- device->timer_fn = ioat3_timer_event;
> >- } else {
> >- dma->device_tx_status = ioat_dma_tx_status;
> >- device->cleanup_fn = ioat2_cleanup_event;
> >- device->timer_fn = ioat2_timer_event;
> >- }
> >+ dma->device_tx_status = ioat3_tx_status;
> >+ device->cleanup_fn = ioat3_cleanup_event;
> >+ device->timer_fn = ioat3_timer_event;
> >
> > #ifdef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
> > dma_cap_clear(DMA_PQ_VAL, dma->cap_mask);
>
> Acked-by: Dan Williams <d...@fb.com>
>
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