On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
> Sekhar ,
>
> On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori <nsek...@ti.com> wrote:
>> On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
>>> From: Lad, Prabhakar <prabhakar....@ti.com>
>>>
>>> Add eth0 device tree node information and pinmux for mii to da850 by
>>> providing interrupt details and local mac address of eth0.
>>>
>>> Signed-off-by: Lad, Prabhakar <prabhakar....@ti.com>
>>> Cc: linux-arm-ker...@lists.infradead.org
>>> Cc: linux-kernel@vger.kernel.org
>>> Cc: davinci-linux-open-sou...@linux.davincidsp.com
>>> Cc: net...@vger.kernel.org
>>> Cc: devicetree-disc...@lists.ozlabs.org
>>> Cc: Sekhar Nori <nsek...@ti.com>
>>> Cc: Heiko Schocher <h...@denx.de>
>>> ---
>>> arch/arm/boot/dts/da850-evm.dts | 5 +++++
>>> arch/arm/boot/dts/da850.dtsi | 35 +++++++++++++++++++++++++++++++++++
>>> 2 files changed, 40 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/da850-evm.dts
>>> b/arch/arm/boot/dts/da850-evm.dts
>>> index a319491..19aa2b3 100644
>>> --- a/arch/arm/boot/dts/da850-evm.dts
>>> +++ b/arch/arm/boot/dts/da850-evm.dts
>>> @@ -30,6 +30,11 @@
>>> mdio: davinci_mdio@1e24000 {
>>> status = "okay";
>>> };
>>> + eth0: emac@1e20000 {
>>> + status = "okay";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&mii_pins>;
>>> + };
>>> };
>>> nand_cs3@62000000 {
>>> status = "okay";
>>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>>> index ba28f2d..76905f3 100644
>>> --- a/arch/arm/boot/dts/da850.dtsi
>>> +++ b/arch/arm/boot/dts/da850.dtsi
>>> @@ -56,6 +56,26 @@
>>> 0x30 0x01100000 0x0ff00000
>>> >;
>>> };
>>> + mii_pins: pinmux_mii_pins {
>>> + pinctrl-single,bits = <
>>> + /*
>>> + * MII_TXEN, MII_TXCLK, MII_COL
>>> + * MII_TXD_3, MII_TXD_2, MII_TXD_1
>>> + * MII_TXD_0
>>> + */
>>> + 0x8 0x88888880 0xfffffff0
>>> + /*
>>> + * MII_RXER, MII_CRS, MII_RXCLK
>>> + * MII_RXDV, MII_RXD_3, MII_RXD_2
>>> + * MII_RXD_1, MII_RXD_0
>>> + */
>>> + 0xc 0x88888888 0xffffffff
>>> + /* MDIO_CLK, MDIO_D */
>>
>> You call this mii_pins, but include mdio pins in there as well. Can you
>> separate them out? Then some board which uses rmii can simply reuse the
>> entry.
>>
> Ok makes sense.
>
>>> + 0x10 0x00222288 0x00ffffff
>>> + /* GPIO2_6 */
>>> + 0x18 0x00000080 0x000000f0
>>
>> This is SoC specific pin list. Such board specific pins should not make
>> it here.
>>
> Ok, so this should be set up using GPIO API's ?
Yes, the pins ultimately will be controlled by gpiolib APIs, but the
pins should be defined under the eth node in .dts
Thanks,
Sekhar
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