Commit-ID: 923d8697e24847000490c187de1aeaca622611a3 Gitweb: http://git.kernel.org/tip/923d8697e24847000490c187de1aeaca622611a3 Author: Youquan Song <youquan.s...@intel.com> AuthorDate: Tue, 18 Dec 2012 12:20:23 -0500 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Thu, 24 Jan 2013 16:14:04 +0100
x86/perf: Add IvyBridge EP support Running the perf utility on a Ivybridge EP server we encounter "not supported" events: <not supported> L1-dcache-loads <not supported> L1-dcache-load-misses <not supported> L1-dcache-stores <not supported> L1-dcache-store-misses <not supported> L1-dcache-prefetches <not supported> L1-dcache-prefetch-misses This patch adds support for this processor. Signed-off-by: Youquan Song <youquan.s...@intel.com> Cc: Andi Kleen <a...@linux.intel.com> Cc: Youquan Song <youquan.s...@linux.intel.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Stephane Eranian <eran...@google.com> Link: http://lkml.kernel.org/r/1355851223-27705-1-git-send-email-youquan.s...@intel.com Signed-off-by: Ingo Molnar <mi...@kernel.org> --- arch/x86/kernel/cpu/perf_event_intel.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index cb313a5..4914e94 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -2087,6 +2087,7 @@ __init int intel_pmu_init(void) pr_cont("SandyBridge events, "); break; case 58: /* IvyBridge */ + case 62: /* IvyBridge EP */ memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
