Hi Aaron, On Tue, Jan 15, 2013 at 02:42:45PM -0600, Aaron Sierra wrote: > In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at > offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to > properly be enabled (and disabled) for these chipsets. > > Signed-off-by: Agócs Pál <agocs.pal...@gmail.com> > Signed-off-by: Aaron Sierra <asie...@xes-inc.com> > --- > drivers/mfd/lpc_ich.c | 40 ++++++++++++++++++++++------------------ > 1 file changed, 22 insertions(+), 18 deletions(-) I'm fine with the gpio base and offset fixes, but the s/id->driver_data/lpc_ich_chipset/ changes are not very nice. It's probably time to introduce an lpc_ich_prv struct that would contain the device id and also the 2 acpi_save and gpio_save static variable. You allocate it in your probe routine and hook it to your pci_dev pointer through pci_set_drvdata(). pci_get_drvdata() will help you fetch that structure back from your pci_dev pointer. The driver will overall look cleaner this way.
Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
