On Thu, 2013-01-17 at 21:51 +0000, Christoph Lameter wrote:
> This is dealing with the same cpu being interrupted. Some of these
> segments are in interrupt disable sections so they are not affected.
Except that we are not always on the same CPU. Now I'm looking at
mainline (non modified by -rt):
>From slab_alloc_node():
/*
* Must read kmem_cache cpu data via this cpu ptr. Preemption is
* enabled. We may switch back and forth between cpus while
* reading from one cpu area. That does not matter as long
* as we end up on the original cpu again when doing the cmpxchg.
*/
c = __this_cpu_ptr(s->cpu_slab);
/*
* The transaction ids are globally unique per cpu and per operation on
* a per cpu queue. Thus they can be guarantee that the cmpxchg_double
* occurs on the right processor and that there was no operation on the
* linked list in between.
*/
tid = c->tid;
barrier();
object = c->freelist;
page = c->page;
if (unlikely(!object || !node_match(page, node)))
object = __slab_alloc(s, gfpflags, node, addr, c);
Where we hit the bug on -rt, and can most certainly do it on mainline.
This code does not disable preemption (the comment even states that). So
if we switch CPUs after reading __this_cpu_ptr(), we are still accessing
the 'c' pointer of the CPU we left. Hence, there's nothing protecting
c->page being NULL when c->freelist is not NULL.
-- Steve
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