2013/1/10 Russell King - ARM Linux <li...@arm.linux.org.uk>: > On Thu, Jan 10, 2013 at 09:02:15AM -0500, Don Zickus wrote: >> On Wed, Jan 09, 2013 at 05:57:39PM -0800, Colin Cross wrote: >> > Emulate NMIs on systems where they are not available by using timer >> > interrupts on other cpus. Each cpu will use its softlockup hrtimer >> > to check that the next cpu is processing hrtimer interrupts by >> > verifying that a counter is increasing. >> > >> > This patch is useful on systems where the hardlockup detector is not >> > available due to a lack of NMIs, for example most ARM SoCs. >> >> I have seen other cpus, like Sparc I think, create a 'virtual NMI' by >> reserving an IRQ line as 'special' (can not be masked). Not sure if that >> is something worth looking at here (or even possible). > > No it isn't, because that assumes that things like spin_lock_irqsave() > won't mask that interrupt. We don't have the facility to do that.
I believe sparc is doing something like this though. Look at arch/sparc/include/asm/irqflags_64.h, it seems NMIs are implemented there using an irq number that is not masked by this function. Not all archs can do that so easily I guess. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
